diff --git a/cranelift/fuzzgen/src/function_generator.rs b/cranelift/fuzzgen/src/function_generator.rs
index 5819be04af..031d1b3583 100644
--- a/cranelift/fuzzgen/src/function_generator.rs
+++ b/cranelift/fuzzgen/src/function_generator.rs
@@ -289,17 +289,16 @@ const OPCODE_SIGNATURES: &'static [(
     (Opcode::Ishl, &[I128, I64], &[I128], insert_opcode),
     (Opcode::Ishl, &[I128, I128], &[I128], insert_opcode),
     // Sshr
-    // Some test cases disabled due to: https://github.com/bytecodealliance/wasmtime/issues/4699
     (Opcode::Sshr, &[I8, I8], &[I8], insert_opcode),
     (Opcode::Sshr, &[I8, I16], &[I8], insert_opcode),
     (Opcode::Sshr, &[I8, I32], &[I8], insert_opcode),
     (Opcode::Sshr, &[I8, I64], &[I8], insert_opcode),
-    // (Opcode::Sshr, &[I8, I128], &[I8], insert_opcode),
+    (Opcode::Sshr, &[I8, I128], &[I8], insert_opcode),
     (Opcode::Sshr, &[I16, I8], &[I16], insert_opcode),
     (Opcode::Sshr, &[I16, I16], &[I16], insert_opcode),
     (Opcode::Sshr, &[I16, I32], &[I16], insert_opcode),
     (Opcode::Sshr, &[I16, I64], &[I16], insert_opcode),
-    // (Opcode::Sshr, &[I16, I128], &[I16], insert_opcode),
+    (Opcode::Sshr, &[I16, I128], &[I16], insert_opcode),
     (Opcode::Sshr, &[I32, I8], &[I32], insert_opcode),
     (Opcode::Sshr, &[I32, I16], &[I32], insert_opcode),
     (Opcode::Sshr, &[I32, I32], &[I32], insert_opcode),
@@ -316,17 +315,16 @@ const OPCODE_SIGNATURES: &'static [(
     (Opcode::Sshr, &[I128, I64], &[I128], insert_opcode),
     (Opcode::Sshr, &[I128, I128], &[I128], insert_opcode),
     // Ushr
-    // Some test cases disabled due to: https://github.com/bytecodealliance/wasmtime/issues/4699
     (Opcode::Ushr, &[I8, I8], &[I8], insert_opcode),
     (Opcode::Ushr, &[I8, I16], &[I8], insert_opcode),
     (Opcode::Ushr, &[I8, I32], &[I8], insert_opcode),
     (Opcode::Ushr, &[I8, I64], &[I8], insert_opcode),
-    // (Opcode::Ushr, &[I8, I128], &[I8], insert_opcode),
+    (Opcode::Ushr, &[I8, I128], &[I8], insert_opcode),
     (Opcode::Ushr, &[I16, I8], &[I16], insert_opcode),
     (Opcode::Ushr, &[I16, I16], &[I16], insert_opcode),
     (Opcode::Ushr, &[I16, I32], &[I16], insert_opcode),
     (Opcode::Ushr, &[I16, I64], &[I16], insert_opcode),
-    // (Opcode::Ushr, &[I16, I128], &[I16], insert_opcode),
+    (Opcode::Ushr, &[I16, I128], &[I16], insert_opcode),
     (Opcode::Ushr, &[I32, I8], &[I32], insert_opcode),
     (Opcode::Ushr, &[I32, I16], &[I32], insert_opcode),
     (Opcode::Ushr, &[I32, I32], &[I32], insert_opcode),