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cranelift: Rework pinned register lowering (#5249)

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Rework pinned register lowering to avoid the use of pinned virtual registers, instead using the MovFromPReg and MovToPReg pseudo instructions.
This commit is contained in:
Trevor Elliott
2022-11-10 16:19:25 -08:00
committed by GitHub
parent 7717d8fa55
commit 0367fbc2d4
14 changed files with 150 additions and 71 deletions
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4
cranelift/filetests/filetests/isa/aarch64/pinned-reg.clif
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@@ -11,6 +11,8 @@ block0:
}
; block0:
; add x21, x21, #1
; mov x1, x21
; add x1, x1, #1
; mov x21, x1
; ret

12
cranelift/filetests/filetests/isa/x64/pinned-reg.clif
View File

@@ -13,7 +13,9 @@ block0:
; pushq %rbp
; movq %rsp, %rbp
; block0:
; addq %r15, $1, %r15
; movq %r15, %rsi
; addq %rsi, $1, %rsi
; movq %rsi, %r15
; movq %rbp, %rsp
; popq %rbp
; ret
@@ -28,8 +30,14 @@ block0:
; pushq %rbp
; movq %rsp, %rbp
; subq %rsp, $16, %rsp
; movq %rsi, 0(%rsp)
; block0:
; addq %r15, $1, %r15
; movq %r15, %rsi
; addq %rsi, $1, %rsi
; movq %rsi, %r15
; movq 0(%rsp), %rsi
; addq %rsp, $16, %rsp
; movq %rbp, %rsp
; popq %rbp
; ret