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cranelift: Rework pinned register lowering (#5249)

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Rework pinned register lowering to avoid the use of pinned virtual registers, instead using the MovFromPReg and MovToPReg pseudo instructions.
This commit is contained in:
Trevor Elliott
2022-11-10 16:19:25 -08:00
committed by GitHub
parent 7717d8fa55
commit 0367fbc2d4
14 changed files with 150 additions and 71 deletions
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14
cranelift/codegen/src/isa/x64/inst/emit.rs
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@@ -698,9 +698,9 @@ pub(crate) fn emit(
);
}
Inst::MovPReg { src, dst } => {
Inst::MovFromPReg { src, dst } => {
let src: Reg = (*src).into();
debug_assert!([regs::rsp(), regs::rbp()].contains(&src));
debug_assert!([regs::rsp(), regs::rbp(), regs::pinned_reg()].contains(&src));
let src = Gpr::new(src).unwrap();
let size = OperandSize::Size64;
let dst = allocs.next(dst.to_reg().to_reg());
@@ -708,6 +708,16 @@ pub(crate) fn emit(
Inst::MovRR { size, src, dst }.emit(&[], sink, info, state);
}
Inst::MovToPReg { src, dst } => {
let src = allocs.next(src.to_reg());
let src = Gpr::new(src).unwrap();
let dst: Reg = (*dst).into();
debug_assert!([regs::rsp(), regs::rbp(), regs::pinned_reg()].contains(&dst));
let dst = WritableGpr::from_writable_reg(Writable::from_reg(dst)).unwrap();
let size = OperandSize::Size64;
Inst::MovRR { size, src, dst }.emit(&[], sink, info, state);
}
Inst::MovzxRmR { ext_mode, src, dst } => {
let dst = allocs.next(dst.to_reg().to_reg());
let (opcodes, num_opcodes, mut rex_flags) = match ext_mode {