cranelift: Rework pinned register lowering (#5249)
Rework pinned register lowering to avoid the use of pinned virtual registers, instead using the MovFromPReg and MovToPReg pseudo instructions.
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@@ -654,13 +654,28 @@ fn aarch64_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut Operan
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collector.reg_def(rd);
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collector.reg_use(rm);
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}
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&Inst::MovPReg { rd, rm } => {
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debug_assert!(
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[regs::fp_reg(), regs::stack_reg(), regs::link_reg()].contains(&rm.into())
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);
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&Inst::MovFromPReg { rd, rm } => {
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debug_assert!([
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regs::fp_reg(),
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regs::stack_reg(),
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regs::link_reg(),
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regs::pinned_reg()
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]
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.contains(&rm.into()));
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debug_assert!(rd.to_reg().is_virtual());
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collector.reg_def(rd);
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}
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&Inst::MovToPReg { rd, rm } => {
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debug_assert!([
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regs::fp_reg(),
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regs::stack_reg(),
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regs::link_reg(),
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regs::pinned_reg()
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]
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.contains(&rd.into()));
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debug_assert!(rm.is_virtual());
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collector.reg_use(rm);
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}
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&Inst::MovK { rd, rn, .. } => {
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collector.reg_use(rn);
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collector.reg_reuse_def(rd, 0); // `rn` == `rd`.
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@@ -1551,11 +1566,16 @@ impl Inst {
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let rm = pretty_print_ireg(rm, size, allocs);
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format!("mov {}, {}", rd, rm)
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}
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&Inst::MovPReg { rd, rm } => {
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&Inst::MovFromPReg { rd, rm } => {
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let rd = pretty_print_ireg(rd.to_reg(), OperandSize::Size64, allocs);
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let rm = show_ireg_sized(rm.into(), OperandSize::Size64);
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format!("mov {}, {}", rd, rm)
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}
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&Inst::MovToPReg { rd, rm } => {
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let rd = show_ireg_sized(rd.into(), OperandSize::Size64);
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let rm = pretty_print_ireg(rm, OperandSize::Size64, allocs);
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format!("mov {}, {}", rd, rm)
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}
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&Inst::MovWide {
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op,
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rd,
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