Add Intel encodings for imul.
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@@ -23,6 +23,11 @@ for inst, opc in [
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# default. Otherwise reg-alloc would never use r8 and up.
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I64.enc(inst.i32, *r.rr(opc))
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I32.enc(base.imul.i32, *r.rrx(0x0f, 0xaf))
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I64.enc(base.imul.i64, *r.rrx.rex(0x0f, 0xaf, w=1))
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I64.enc(base.imul.i32, *r.rrx.rex(0x0f, 0xaf))
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I64.enc(base.imul.i32, *r.rrx(0x0f, 0xaf))
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I32.enc(base.copy.i32, *r.umr(0x89))
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I64.enc(base.copy.i64, *r.umr.rex(0x89, w=1))
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I64.enc(base.copy.i32, *r.umr.rex(0x89))
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