x64: Implement SIMD fma (#4474)

* x64: Add VEX Instruction Encoder

This uses a similar builder pattern to the EVEX Encoder.
Does not yet support memory accesses.

* x64: Add FMA Flag

* x64: Implement SIMD `fma`

* x64: Use 4 register Vex Inst

* x64: Reorder VEX pretty print args
This commit is contained in:
Afonso Bordado
2022-07-25 23:01:02 +01:00
committed by GitHub
parent 4aaf7ff8d9
commit 02c3b47db2
15 changed files with 640 additions and 3 deletions

View File

@@ -193,6 +193,13 @@
(src2 XmmMem)
(dst WritableXmm))
;; XMM (scalar or vector) binary op that relies on the VEX prefix.
(XmmRmRVex (op AvxOpcode)
(src1 Xmm)
(src2 Xmm)
(src3 XmmMem)
(dst WritableXmm))
;; XMM (scalar or vector) binary op that relies on the EVEX prefix.
(XmmRmREvex (op Avx512Opcode)
(src1 XmmMem)
@@ -1042,6 +1049,10 @@
(decl intcc_to_cc (IntCC) CC)
(extern constructor intcc_to_cc intcc_to_cc)
(type AvxOpcode extern
(enum Vfmadd213ps
Vfmadd213pd))
(type Avx512Opcode extern
(enum Vcvtudq2ps
Vpabsq
@@ -2839,6 +2850,28 @@
dst))
;; Helper for creating `MInst.XmmRmRVex` instructions.
(decl xmm_rmr_vex (AvxOpcode Xmm Xmm XmmMem) Xmm)
(rule (xmm_rmr_vex op src1 src2 src3)
(let ((dst WritableXmm (temp_writable_xmm))
(_ Unit (emit (MInst.XmmRmRVex op
src1
src2
src3
dst))))
dst))
;; Helper for creating `vfmadd213ps` instructions.
(decl x64_vfmadd213ps (Xmm Xmm XmmMem) Xmm)
(rule (x64_vfmadd213ps x y z)
(xmm_rmr_vex (AvxOpcode.Vfmadd213ps) x y z))
;; Helper for creating `vfmadd213pd` instructions.
(decl x64_vfmadd213pd (Xmm Xmm XmmMem) Xmm)
(rule (x64_vfmadd213pd x y z)
(xmm_rmr_vex (AvxOpcode.Vfmadd213pd) x y z))
;; Helper for creating `sqrtss` instructions.
(decl x64_sqrtss (Xmm) Xmm)
(rule (x64_sqrtss x)