395 lines
13 KiB
C
395 lines
13 KiB
C
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <fadec-enc.h>
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#ifdef __GNUC__
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#define LIKELY(x) __builtin_expect((x), 1)
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#define UNLIKELY(x) __builtin_expect((x), 0)
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#else
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#define LIKELY(x) (x)
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#define UNLIKELY(x) (x)
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#endif
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#define OPC_66 0x80000
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#define OPC_F2 0x100000
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#define OPC_F3 0x200000
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#define OPC_REXW 0x400000
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#define OPC_LOCK 0x800000
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#define OPC_VEXL0 0x1000000
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#define OPC_VEXL1 0x1800000
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#define OPC_EVEXL0 0x2000000
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#define OPC_EVEXL1 0x2800000
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#define OPC_EVEXL2 0x3000000
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#define OPC_EVEXL3 0x3800000
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#define OPC_EVEXB 0x4000000
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#define OPC_VSIB 0x8000000
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#define OPC_67 FE_ADDR32
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#define OPC_SEG_MSK 0xe0000000
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#define OPC_JMPL FE_JMPL
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#define OPC_MASK_MSK 0x1e00000000
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#define OPC_USER_MSK (OPC_67|OPC_SEG_MSK|OPC_MASK_MSK)
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#define OPC_GPH_OP0 0x200000000000
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#define OPC_GPH_OP1 0x400000000000
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#define EPFX_REX_MSK 0x0f
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#define EPFX_REX 0x08
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#define EPFX_REXR 0x04
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#define EPFX_REXX 0x02
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#define EPFX_REXB 0x01
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#define EPFX_VVVV_IDX 4
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static bool op_mem(FeOp op) { return op < 0; }
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static bool op_reg(FeOp op) { return op >= 0; }
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static bool op_reg_gpl(FeOp op) { return (op & ~0xf) == 0x100; }
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static bool op_reg_gph(FeOp op) { return (op & ~0x3) == 0x204; }
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static bool op_reg_xmm(FeOp op) { return (op & ~0xf) == 0x600; }
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static int64_t op_mem_offset(FeOp op) { return (int32_t) op; }
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static unsigned op_mem_base(FeOp op) { return (op >> 32) & 0xfff; }
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static unsigned op_mem_idx(FeOp op) { return (op >> 44) & 0xfff; }
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static unsigned op_mem_scale(FeOp op) { return (op >> 56) & 0xf; }
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static unsigned op_reg_idx(FeOp op) { return op & 0xff; }
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static bool op_imm_n(FeOp imm, unsigned immsz) {
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if (immsz == 0 && !imm) return true;
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if (immsz == 1 && (int8_t) imm == imm) return true;
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if (immsz == 2 && (int16_t) imm == imm) return true;
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if (immsz == 3 && (imm&0xffffff) == imm) return true;
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if (immsz == 4 && (int32_t) imm == imm) return true;
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if (immsz == 8 && (int64_t) imm == imm) return true;
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return false;
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}
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static
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unsigned
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opc_size(uint64_t opc, uint64_t epfx)
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{
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unsigned res = 1;
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if (UNLIKELY(opc & OPC_EVEXL0)) {
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res += 4;
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} else if (UNLIKELY(opc & OPC_VEXL0)) {
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if (opc & (OPC_REXW|0x20000) || epfx & (EPFX_REXX|EPFX_REXB))
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res += 3;
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else
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res += 2;
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} else {
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if (opc & OPC_LOCK) res++;
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if (opc & OPC_66) res++;
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if (opc & (OPC_F2|OPC_F3)) res++;
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if (opc & OPC_REXW || epfx & EPFX_REX_MSK) res++;
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if (opc & 0x30000) res++;
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if (opc & 0x20000) res++;
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}
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if (opc & OPC_SEG_MSK) res++;
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if (opc & OPC_67) res++;
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if (opc & 0x8000) res++;
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return res;
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}
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static
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int
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enc_opc(uint8_t** restrict buf, uint64_t opc, uint64_t epfx)
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{
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if (opc & OPC_SEG_MSK)
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*(*buf)++ = (0x65643e362e2600 >> (8 * ((opc >> 29) & 7))) & 0xff;
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if (opc & OPC_67) *(*buf)++ = 0x67;
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if (opc & OPC_EVEXL0) {
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return -1;
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} else if (opc & OPC_VEXL0) {
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bool vex3 = opc & (OPC_REXW|0x20000) || epfx & (EPFX_REXX|EPFX_REXB);
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unsigned pp = 0;
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if (opc & OPC_66) pp = 1;
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if (opc & OPC_F3) pp = 2;
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if (opc & OPC_F2) pp = 3;
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*(*buf)++ = 0xc4 | !vex3;
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unsigned b2 = pp | (opc & 0x800000 ? 0x4 : 0);
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if (vex3) {
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unsigned b1 = opc >> 16 & 3;
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if (!(epfx & EPFX_REXR)) b1 |= 0x80;
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if (!(epfx & EPFX_REXX)) b1 |= 0x40;
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if (!(epfx & EPFX_REXB)) b1 |= 0x20;
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*(*buf)++ = b1;
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if (opc & OPC_REXW) b2 |= 0x80;
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} else {
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if (!(epfx & EPFX_REXR)) b2 |= 0x80;
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}
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b2 |= (~(epfx >> EPFX_VVVV_IDX) & 0xf) << 3;
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*(*buf)++ = b2;
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} else {
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if (opc & OPC_LOCK) *(*buf)++ = 0xF0;
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if (opc & OPC_66) *(*buf)++ = 0x66;
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if (opc & OPC_F2) *(*buf)++ = 0xF2;
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if (opc & OPC_F3) *(*buf)++ = 0xF3;
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if (opc & OPC_REXW || epfx & (EPFX_REX_MSK)) {
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unsigned rex = 0x40;
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if (opc & OPC_REXW) rex |= 8;
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if (epfx & EPFX_REXR) rex |= 4;
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if (epfx & EPFX_REXX) rex |= 2;
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if (epfx & EPFX_REXB) rex |= 1;
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*(*buf)++ = rex;
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}
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if (opc & 0x30000) *(*buf)++ = 0x0F;
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if ((opc & 0x30000) == 0x20000) *(*buf)++ = 0x38;
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if ((opc & 0x30000) == 0x30000) *(*buf)++ = 0x3A;
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}
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*(*buf)++ = opc & 0xff;
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if (opc & 0x8000) *(*buf)++ = (opc >> 8) & 0xff;
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return 0;
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}
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static
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int
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enc_imm(uint8_t** restrict buf, uint64_t imm, unsigned immsz)
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{
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if (!op_imm_n(imm, immsz)) return -1;
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for (unsigned i = 0; i < immsz; i++)
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*(*buf)++ = imm >> 8 * i;
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return 0;
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}
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static
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int
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enc_o(uint8_t** restrict buf, uint64_t opc, uint64_t epfx, uint64_t op0)
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{
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if (op_reg_idx(op0) & 0x8) epfx |= EPFX_REXB;
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bool has_rex = opc & OPC_REXW || epfx & EPFX_REX_MSK;
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if (has_rex && op_reg_gph(op0)) return -1;
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if (enc_opc(buf, opc, epfx)) return -1;
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*(*buf - 1) = (*(*buf - 1) & 0xf8) | (op_reg_idx(op0) & 0x7);
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return 0;
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}
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static
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int
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enc_mr(uint8_t** restrict buf, uint64_t opc, uint64_t epfx, uint64_t op0,
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uint64_t op1, unsigned immsz)
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{
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// If !op_reg(op1), it is a constant value for ModRM.reg
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if (op_reg(op0) && (op_reg_idx(op0) & 0x8)) epfx |= EPFX_REXB;
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if (op_mem(op0) && (op_mem_base(op0) & 0x8)) epfx |= EPFX_REXB;
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if (op_mem(op0) && (op_mem_idx(op0) & 0x8)) epfx |= EPFX_REXX;
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if (op_reg(op1) && op_reg_idx(op1) & 0x8) epfx |= EPFX_REXR;
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bool has_rex = opc & OPC_REXW || epfx & EPFX_REX_MSK;
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if (has_rex && (op_reg_gph(op0) || op_reg_gph(op1))) return -1;
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if (LIKELY(op_reg(op0))) {
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if (enc_opc(buf, opc, epfx)) return -1;
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*(*buf)++ = 0xc0 | ((op_reg_idx(op1) & 7) << 3) | (op_reg_idx(op0) & 7);
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return 0;
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}
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unsigned opcsz = opc_size(opc, epfx);
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int mod = 0, reg = op1 & 7, rm;
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int scale = 0, idx = 4, base = 0;
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int32_t off = op_mem_offset(op0);
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bool withsib = false;
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if (!!op_mem_idx(op0) != !!op_mem_scale(op0)) return -1;
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if (!op_mem_idx(op0) && (opc & OPC_VSIB)) return -1;
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if (op_mem_idx(op0))
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{
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if (opc & OPC_VSIB)
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{
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if (!op_reg_xmm(op_mem_idx(op0))) return -1;
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}
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else
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{
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if (!op_reg_gpl(op_mem_idx(op0))) return -1;
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if (op_reg_idx(op_mem_idx(op0)) == 4) return -1;
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}
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idx = op_mem_idx(op0) & 7;
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int scalabs = op_mem_scale(op0);
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if (scalabs & (scalabs - 1)) return -1;
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scale = (scalabs & 0xA ? 1 : 0) | (scalabs & 0xC ? 2 : 0);
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withsib = true;
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}
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unsigned dispsz = 0;
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if (!op_mem_base(op0))
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{
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base = 5;
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rm = 4;
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dispsz = 4;
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}
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else if (op_mem_base(op0) == FE_IP)
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{
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rm = 5;
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dispsz = 4;
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// Adjust offset, caller doesn't know instruction length.
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off -= opcsz + 5 + immsz;
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if (withsib) return -1;
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}
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else
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{
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if (!op_reg_gpl(op_mem_base(op0))) return -1;
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rm = op_reg_idx(op_mem_base(op0)) & 7;
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if (withsib || rm == 4) {
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base = rm;
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rm = 4;
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}
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if (off) {
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mod = op_imm_n(off, 1) ? 0x40 : 0x80;
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dispsz = op_imm_n(off, 1) ? 1 : 4;
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} else if (rm == 5) {
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mod = 0x40;
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dispsz = 1;
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}
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}
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if (opcsz + 1 + (rm == 4) + dispsz + immsz > 15) return -1;
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if (enc_opc(buf, opc, epfx)) return -1;
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*(*buf)++ = mod | (reg << 3) | rm;
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if (UNLIKELY(rm == 4))
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*(*buf)++ = (scale << 6) | (idx << 3) | base;
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return enc_imm(buf, off, dispsz);
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}
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typedef enum {
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ENC_INVALID = 0,
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ENC_NP,
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ENC_M, ENC_M1, ENC_MI, ENC_MC, ENC_MR, ENC_RM, ENC_RMA, ENC_MRI, ENC_RMI, ENC_MRC,
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ENC_AM, ENC_MA,
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ENC_I, ENC_IA, ENC_O, ENC_OI, ENC_OA, ENC_S, ENC_A, ENC_D, ENC_FD, ENC_TD,
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ENC_RVM, ENC_RVMI, ENC_RVMR, ENC_RMV, ENC_VM, ENC_VMI, ENC_MVR, ENC_MRV,
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ENC_MAX
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} Encoding;
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struct EncodingInfo {
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uint8_t modrm : 2;
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uint8_t modreg : 2;
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uint8_t vexreg : 2;
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uint8_t immidx : 2;
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uint8_t immctl : 3;
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uint8_t zregidx : 2;
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uint8_t zregval : 1;
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};
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const struct EncodingInfo encoding_infos[ENC_MAX] = {
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[ENC_INVALID] = { 0 },
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[ENC_NP] = { 0 },
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[ENC_M] = { .modrm = 0x0^3 },
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[ENC_M1] = { .modrm = 0x0^3, .immctl = 1, .immidx = 1 },
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[ENC_MI] = { .modrm = 0x0^3, .immctl = 4, .immidx = 1 },
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[ENC_MC] = { .modrm = 0x0^3, .zregidx = 0x1^3, .zregval = 1 },
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[ENC_MR] = { .modrm = 0x0^3, .modreg = 0x1^3 },
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[ENC_RM] = { .modrm = 0x1^3, .modreg = 0x0^3 },
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[ENC_RMA] = { .modrm = 0x1^3, .modreg = 0x0^3, .zregidx = 0x2^3, .zregval = 0 },
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[ENC_MRI] = { .modrm = 0x0^3, .modreg = 0x1^3, .immctl = 4, .immidx = 2 },
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[ENC_RMI] = { .modrm = 0x1^3, .modreg = 0x0^3, .immctl = 4, .immidx = 2 },
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[ENC_MRC] = { .modrm = 0x0^3, .modreg = 0x1^3, .zregidx = 0x2^3, .zregval = 1 },
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[ENC_AM] = { .modrm = 0x1^3, .zregidx = 0x0^3, .zregval = 0 },
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[ENC_MA] = { .modrm = 0x0^3, .zregidx = 0x1^3, .zregval = 0 },
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[ENC_I] = { .immctl = 4, .immidx = 0 },
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[ENC_IA] = { .zregidx = 0x0^3, .zregval = 0, .immctl = 4, .immidx = 1 },
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[ENC_O] = { .modreg = 0x0^3 },
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[ENC_OI] = { .modreg = 0x0^3, .immctl = 4, .immidx = 1 },
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[ENC_OA] = { .modreg = 0x0^3, .zregidx = 0x1^3, .zregval = 0 },
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[ENC_S] = { 0 },
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[ENC_A] = { .zregidx = 0x0^3, .zregval = 0 },
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[ENC_D] = { .immctl = 6, .immidx = 0 },
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[ENC_FD] = { .zregidx = 0x0^3, .zregval = 0, .immctl = 2, .immidx = 1 },
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[ENC_TD] = { .zregidx = 0x1^3, .zregval = 0, .immctl = 2, .immidx = 0 },
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[ENC_RVM] = { .modrm = 0x2^3, .modreg = 0x0^3, .vexreg = 0x1^3 },
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[ENC_RVMI] = { .modrm = 0x2^3, .modreg = 0x0^3, .vexreg = 0x1^3, .immctl = 4, .immidx = 3 },
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[ENC_RVMR] = { .modrm = 0x2^3, .modreg = 0x0^3, .vexreg = 0x1^3, .immctl = 3, .immidx = 3 },
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[ENC_RMV] = { .modrm = 0x1^3, .modreg = 0x0^3, .vexreg = 0x2^3 },
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[ENC_VM] = { .modrm = 0x1^3, .vexreg = 0x0^3 },
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[ENC_VMI] = { .modrm = 0x1^3, .vexreg = 0x0^3, .immctl = 4, .immidx = 2 },
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[ENC_MVR] = { .modrm = 0x0^3, .modreg = 0x2^3, .vexreg = 0x1^3 },
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[ENC_MRV] = { .modrm = 0x0^3, .modreg = 0x1^3, .vexreg = 0x2^3 },
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};
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static const uint64_t alt_tab[] = {
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#include <fadec-encode-private.inc>
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};
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int
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fe_enc64_impl(uint8_t** restrict buf, uint64_t opc, FeOp op0, FeOp op1,
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FeOp op2, FeOp op3)
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{
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uint8_t* buf_start = *buf;
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uint64_t ops[4] = {op0, op1, op2, op3};
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uint64_t epfx = 0;
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// Doesn't change between variants
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if ((opc & OPC_GPH_OP0) && op_reg_gpl(op0) && op0 >= FE_SP)
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epfx |= EPFX_REX;
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else if (!(opc & OPC_GPH_OP0) && op_reg_gph(op0))
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goto fail;
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if ((opc & OPC_GPH_OP1) && op_reg_gpl(op1) && op1 >= FE_SP)
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epfx |= EPFX_REX;
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else if (!(opc & OPC_GPH_OP1) && op_reg_gph(op1))
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goto fail;
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try_encode:;
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unsigned enc = (opc >> 51) & 0x1f;
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const struct EncodingInfo* ei = &encoding_infos[enc];
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int64_t imm = 0xcc;
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unsigned immsz = (opc >> 47) & 0xf;
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if (UNLIKELY(ei->zregidx && op_reg_idx(ops[ei->zregidx^3]) != ei->zregval))
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goto next;
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if (UNLIKELY(enc == ENC_S)) {
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if ((op_reg_idx(op0) << 3 & 0x20) != (opc & 0x20)) goto next;
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opc |= op_reg_idx(op0) << 3;
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}
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if (ei->immctl > 0) {
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imm = ops[ei->immidx];
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if (ei->immctl == 2) {
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immsz = UNLIKELY(opc & OPC_67) ? 4 : 8;
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if (immsz == 4) imm = (int32_t) imm; // address are zero-extended
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}
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if (ei->immctl == 3) {
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if (!op_reg_xmm(imm)) goto fail;
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imm = op_reg_idx(imm) << 4;
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}
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if (ei->immctl == 6) {
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if (UNLIKELY(opc & FE_JMPL) && opc >> 56) goto next;
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imm -= (int64_t) *buf + opc_size(opc, epfx) + immsz;
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}
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if (UNLIKELY(ei->immctl == 1) && imm != 1) goto next;
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if (ei->immctl >= 2 && !op_imm_n(imm, immsz)) goto next;
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}
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// NOP has no operands, so this must be the 32-bit OA XCHG
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if ((opc & 0xfffffff) == 0x90 && ops[0] == FE_AX) goto next;
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if (ei->modrm) {
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FeOp modreg = ei->modreg ? ops[ei->modreg^3] : (opc & 0xff00) >> 8;
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if (ei->vexreg)
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epfx |= ((uint64_t) op_reg_idx(ops[ei->vexreg^3])) << EPFX_VVVV_IDX;
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if (enc_mr(buf, opc, epfx, ops[ei->modrm^3], modreg, immsz)) goto fail;
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} else if (ei->modreg) {
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if (enc_o(buf, opc, epfx, ops[ei->modreg^3])) goto fail;
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} else {
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if (enc_opc(buf, opc, epfx)) goto fail;
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}
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if (ei->immctl >= 2)
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if (enc_imm(buf, imm, immsz)) goto fail;
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return 0;
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|
next:;
|
|
uint64_t alt = opc >> 56;
|
|
if (alt) { // try alternative encoding, if available
|
|
opc = alt_tab[alt] | (opc & OPC_USER_MSK);
|
|
goto try_encode;
|
|
}
|
|
|
|
fail:
|
|
// Don't advance buffer on error; though we shouldn't write anything.
|
|
*buf = buf_start;
|
|
return -1;
|
|
}
|