6b8c2968c1
This is an *experimental* (read: unstable) API which exposes encoding functionality as one function per instruction. This makes the encoding process itself significantly faster, at the cost of a much larger binary size (~1 MiB of code, no data) and much higher compilation time.
136 lines
3.9 KiB
C
136 lines
3.9 KiB
C
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <fadec-enc2.h>
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#define LIKELY(x) __builtin_expect((x), 1)
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#define UNLIKELY(x) __builtin_expect((x), 0)
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#define op_reg_idx(op) (op).idx
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#define op_reg_gph(op) (((op).idx & ~0x3) == 0x24)
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#define op_mem_base(mem) op_reg_idx((mem).base)
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#define op_mem_idx(mem) op_reg_idx((mem).idx)
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static bool
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op_imm_n(int64_t imm, unsigned immsz) {
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if (immsz == 0 && !imm) return true;
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if (immsz == 1 && (int8_t) imm == imm) return true;
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if (immsz == 2 && (int16_t) imm == imm) return true;
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if (immsz == 3 && (imm&0xffffff) == imm) return true;
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if (immsz == 4 && (int32_t) imm == imm) return true;
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if (immsz == 8 && (int64_t) imm == imm) return true;
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return false;
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}
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static __attribute__((cold)) __attribute__((const)) uint8_t
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enc_seg(int flags) {
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return (0x65643e362e2600 >> (8 * (flags & FE_SEG_MASK))) & 0xff;
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}
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static int
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enc_imm(uint8_t* restrict buf, uint64_t imm, unsigned immsz) {
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if (!op_imm_n(imm, immsz))
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return -1;
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for (unsigned i = 0; i < immsz; i++)
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*buf++ = imm >> 8 * i;
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return 0;
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}
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static int
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enc_mem(uint8_t* restrict buf, unsigned bufidx, FeMem op0, uint64_t op1,
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unsigned immsz, unsigned vsib) {
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int mod = 0, reg = op1 & 7, rm;
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int scale = 0, idx = 4, base = 0;
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bool withsib = false, mod0off = false;
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unsigned dispsz = 0;
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int32_t off = op0.off;
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if ((op_reg_idx(op0.idx) != op_reg_idx(FE_NOREG)) != !!op0.scale)
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return 0;
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if (vsib || op_reg_idx(op0.idx) != op_reg_idx(FE_NOREG)) {
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if (!vsib && op_reg_idx(op0.idx) == 4)
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return 0;
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idx = op_reg_idx(op0.idx) & 7;
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int scalabs = op0.scale;
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if (scalabs & (scalabs - 1))
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return 0;
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scale = (scalabs & 0xA ? 1 : 0) | (scalabs & 0xC ? 2 : 0);
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withsib = true;
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}
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if (op0.base.idx == op_reg_idx(FE_NOREG)) {
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rm = 5;
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mod0off = true;
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withsib = true;
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} else if (op0.base.idx == FE_IP.idx) {
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if (withsib)
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return 0;
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rm = 5;
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mod0off = true;
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// Adjust offset, caller doesn't know instruction length.
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off -= bufidx + 5 + immsz;
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} else {
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rm = op_reg_idx(op0.base) & 7;
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if (rm == 5)
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mod = 1;
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}
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if (off && op_imm_n(off, 1) && !mod0off)
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mod = 1;
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else if (off && !mod0off)
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mod = 2;
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if (withsib || rm == 4) {
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base = rm;
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rm = 4;
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}
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dispsz = mod == 1 ? 1 : (mod == 2 || mod0off) ? 4 : 0;
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if (bufidx + 1 + (mod != 3 && rm == 4) + dispsz + immsz > 15)
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return 0;
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buf[bufidx++] = (mod << 6) | (reg << 3) | rm;
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if (mod != 3 && rm == 4)
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buf[bufidx++] = (scale << 6) | (idx << 3) | base;
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if (enc_imm(buf + bufidx, off, dispsz))
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return 0;
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return 1 + (mod != 3 && rm == 4) + dispsz;
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}
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static int
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enc_mem_vsib(uint8_t* restrict buf, unsigned bufidx, FeMemV op0, uint64_t op1,
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unsigned immsz, unsigned vsib) {
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(void) vsib;
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FeMem mem = FE_MEM(op0.base, op0.scale, FE_GP(op0.idx.idx), op0.off);
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return enc_mem(buf, bufidx, mem, op1, immsz, 1);
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}
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unsigned fe64_NOP(uint8_t* buf, unsigned flags) {
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unsigned len = flags ? flags : 1;
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// Taken from Intel SDM
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static const uint8_t tbl[] = {
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0x90,
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0x66, 0x90,
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0x0f, 0x1f, 0x00,
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0x0f, 0x1f, 0x40, 0x00,
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0x0f, 0x1f, 0x44, 0x00, 0x00,
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0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
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0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
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0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x66, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00,
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};
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unsigned remain = len;
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for (; remain > 9; remain -= 9)
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for (unsigned i = 0; i < 9; i++)
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*(buf++) = tbl[36 + i];
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const uint8_t* src = tbl + (remain * (remain - 1)) / 2;
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for (unsigned i = 0; i < remain; i++)
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*(buf++) = src[i];
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return len;
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}
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#include <fadec-encode2-private.inc>
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