Update README
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13
README.md
13
README.md
@@ -4,17 +4,18 @@ Fadec is a fast and lightweight decoder for x86-32 and x86-64. To meet the goal
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*Note: This is not a disassembler, it does not intend to produce valid assembly.*
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### Key features
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## Key features
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**Q: Why not just just use any other decoder available out there?**
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A: Because I needed to embed a small and fast decoder in a project which didn't link against a libc.
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> **Q: Why not just just use any other decoder available out there?**
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>
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> A: Because I needed to embed a small and fast decoder in a project which didn't link against a libc.
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- **Small size:** the compiled library uses only 40 kiB and the main decode routine is only a few hundreds lines of code.
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- **Performance:** Fadec is significantly times faster than libopcodes or Capstone due to the absence of high-level abstractions and the small lookup table.
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- **Almost no dependencies:** the formatter only uses the function `snprintf`, the decoder itself has no dependencies, making it suitable for environments without a full libc or `malloc`-style memory allocation.
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- **Correctness:** even corner cases should be handled correctly (if not, that's a bug), e.g., the order of prefixes, the presence of the `lock` prefix, or properly handling VEX.W in 32-bit mode.
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### Basic Usage
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## Basic Usage
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```c
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FdInstr instr;
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// Decode from buffer in 64-bit mode and virtual address 0x401000
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@@ -23,7 +24,7 @@ int ret = fd_decode(buffer, sizeof(buffer), 64, 0x401000, &instr);
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// Relevant properties of instructions can now be queries using the FD_* macros.
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```
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### Intended differences
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## Intended differences to other decoders
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To achieve higher performance, minor differences to other decoders exist, requiring special handling.
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- The registers `ah`/... and `spl`/... have the same number (as in machine code). Distinguishing them is possible using `FD_OP_REG_HIGH`.
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@@ -38,7 +39,7 @@ To achieve higher performance, minor differences to other decoders exist, requir
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- The instructions `bsf`/`tzcnt` and `bsr`/`lzcnt` can only be distinguished by the presence of a `rep` prefix (matching the machine code encoding). Note that on older processors `tzcnt`/`lzcnt` are executed as plain `rep bsf`/`rep bsr`.
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- The instructions `movbe`/`crc32` can only be distinguished by the presence of a `repnz` prefix.
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### Known issues
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## Known issues
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- MMX instructions are not supported yet.
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- The AVX VSIB encoding is not supported yet, all instructions using this will result in a decode error.
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- The EVEX prefix (AVX-512) is not supported (yet).
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