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instrs: Minor fixes to operand sizes

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This commit is contained in:
Alexis Engelke
2021-01-03 17:50:49 +01:00
parent d2bf961b77
commit d8c7ee94b7
2 changed files with 11 additions and 11 deletions
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16
instrs.txt
View File

@@ -61,7 +61,7 @@
3c IA GP IMM - - CMP SIZE_8 3c IA GP IMM - - CMP SIZE_8
3d IA GP IMM - - CMP 3d IA GP IMM - - CMP
#3e SEG=DS prefix #3e SEG=DS prefix
3f NP - - - - AAS ONLY32 INSTR_WIDTH 3f NP - - - - AAS ONLY32
40+ O GP - - - INC ONLY32 40+ O GP - - - INC ONLY32
48+ O GP - - - DEC ONLY32 48+ O GP - - - DEC ONLY32
50+ O GP - - - PUSH DEF64 50+ O GP - - - PUSH DEF64
@@ -459,7 +459,7 @@ NP.0fc7/1m M MEMZ - - - CMPXCHGD LOCK INSTR_WIDT
0fff RM GP GP - - UD0 0fff RM GP GP - - UD0
# #
NFx.0f38f0/m RM GP MEM - - MOVBE NFx.0f38f0/m RM GP MEM - - MOVBE
F2.0f38f0 RM GP32 GP - - CRC32 USE66 SIZE_8 F2.0f38f0 RM GP32 GP - - CRC32 SIZE_8
NFx.0f38f1/m MR MEM GP - - MOVBE NFx.0f38f1/m MR MEM GP - - MOVBE
F2.0f38f1 RM GP32 GP - - CRC32 USE66 F2.0f38f1 RM GP32 GP - - CRC32 USE66
# #
@@ -698,8 +698,8 @@ F2.0f7d RM XMM XMM - - SSE_HSUBPS
F3.0f7e RM XMM XMM64 - - SSE_MOVQ F3.0f7e RM XMM XMM64 - - SSE_MOVQ
66.0f7f MR XMM XMM - - SSE_MOVDQA 66.0f7f MR XMM XMM - - SSE_MOVDQA
F3.0f7f MR XMM XMM - - SSE_MOVDQU F3.0f7f MR XMM XMM - - SSE_MOVDQU
NP.0fae/0m M MEMZ - - - FXSAVE NP.0fae/0m M MEMZ - - - FXSAVE INSTR_WIDTH
NP.0fae/1m M MEMZ - - - FXRSTOR NP.0fae/1m M MEMZ - - - FXRSTOR INSTR_WIDTH
NP.0fae/2m M MEM32 - - - LDMXCSR NP.0fae/2m M MEM32 - - - LDMXCSR
NP.0fae/3m M MEM32 - - - STMXCSR NP.0fae/3m M MEM32 - - - STMXCSR
NP.0faee8 NP - - - - LFENCE NP.0faee8 NP - - - - LFENCE
@@ -1409,16 +1409,16 @@ NP.0f1c/0m M MEMZ - - - CLDEMOTE
66.0f3880/m RM GP MEMZ - - INVEPT DEF64 66.0f3880/m RM GP MEMZ - - INVEPT DEF64
66.0f3881/m RM GP MEMZ - - INVVPID DEF64 66.0f3881/m RM GP MEMZ - - INVVPID DEF64
NP.0f01c1 NP - - - - VMCALL NP.0f01c1 NP - - - - VMCALL
66.0fc7/6m M MEMZ - - - VMCLEAR 66.0fc7/6m M MEM64 - - - VMCLEAR
NP.0f01d4 NP - - - - VMFUNC NP.0f01d4 NP - - - - VMFUNC
NP.0f01c2 NP - - - - VMLAUNCH NP.0f01c2 NP - - - - VMLAUNCH
NP.0f01c3 NP - - - - VMRESUME NP.0f01c3 NP - - - - VMRESUME
NP.0fc7/6m M MEMZ - - - VMPTRLD NP.0fc7/6m M MEM64 - - - VMPTRLD
NP.0fc7/7m M MEMZ - - - VMPTRST NP.0fc7/7m M MEM64 - - - VMPTRST
NP.0f78 MR GP GP - - VMREAD DEF64 NP.0f78 MR GP GP - - VMREAD DEF64
NP.0f79 MR GP GP - - VMWRITE DEF64 NP.0f79 MR GP GP - - VMWRITE DEF64
NP.0f01c4 NP - - - - VMXOFF NP.0f01c4 NP - - - - VMXOFF
F3.0fc7/6m M MEMZ - - - VMXON F3.0fc7/6m M MEM64 - - - VMXON
# SEAM/TDX # SEAM/TDX
66.0f01cc NP - - - - TDCALL 66.0f01cc NP - - - - TDCALL
66.0f01cd NP - - - - SEAMRET 66.0f01cd NP - - - - SEAMRET

6
tests/test_decode.c
View File

@@ -265,9 +265,9 @@ main(int argc, char** argv)
TEST64("\x66\xf3\x0f\xc7\xf8", "[RDPID reg8:r0]"); TEST64("\x66\xf3\x0f\xc7\xf8", "[RDPID reg8:r0]");
TEST64("\xf3\x66\x0f\xc7\xf8", "[RDPID reg8:r0]"); TEST64("\xf3\x66\x0f\xc7\xf8", "[RDPID reg8:r0]");
TEST64("\xf3\x0f\xc7\x00", "UD"); TEST64("\xf3\x0f\xc7\x00", "UD");
TEST64("\x0f\xc7\x30", "[VMPTRLD mem0:r0]"); TEST64("\x0f\xc7\x30", "[VMPTRLD mem8:r0]");
TEST64("\x66\x0f\xc7\x30", "[VMCLEAR mem0:r0]"); TEST64("\x66\x0f\xc7\x30", "[VMCLEAR mem8:r0]");
TEST64("\xf3\x0f\xc7\x30", "[VMXON mem0:r0]"); TEST64("\xf3\x0f\xc7\x30", "[VMXON mem8:r0]");
TEST64("\x0f\x09", "[WBINVD]"); TEST64("\x0f\x09", "[WBINVD]");
TEST64("\xf3\x0f\x09", "[WBNOINVD]"); TEST64("\xf3\x0f\x09", "[WBNOINVD]");