decode: Replace T8+T72 with T16+T8E for R/M value
This commit is contained in:
15
decode.c
15
decode.c
@@ -30,8 +30,8 @@ typedef enum DecodeMode DecodeMode;
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#define ENTRY_NONE 0
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#define ENTRY_NONE 0
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#define ENTRY_INSTR 1
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#define ENTRY_INSTR 1
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#define ENTRY_TABLE256 2
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#define ENTRY_TABLE256 2
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#define ENTRY_TABLE8 3
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#define ENTRY_TABLE16 3
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#define ENTRY_TABLE72 4
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#define ENTRY_TABLE8E 4
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#define ENTRY_TABLE_PREFIX 5
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#define ENTRY_TABLE_PREFIX 5
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#define ENTRY_TABLE_VEX 6
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#define ENTRY_TABLE_VEX 6
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#define ENTRY_TABLE_ROOT 8
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#define ENTRY_TABLE_ROOT 8
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@@ -409,13 +409,12 @@ fd_decode(const uint8_t* buffer, size_t len_sz, int mode_int, uintptr_t address,
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}
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}
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// Then, walk through ModR/M-encoded opcode extensions.
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// Then, walk through ModR/M-encoded opcode extensions.
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if ((kind == ENTRY_TABLE8 || kind == ENTRY_TABLE72) && LIKELY(off < len))
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if (kind == ENTRY_TABLE16 && LIKELY(off < len)) {
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{
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unsigned isreg = (buffer[off] & 0xc0) == 0xc0 ? 8 : 0;
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if (kind == ENTRY_TABLE72 && (buffer[off] & 0xc0) == 0xc0)
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ENTRY_UNPACK(table, kind, table[((buffer[off] >> 3) & 7) | isreg]);
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ENTRY_UNPACK(table, kind, table[buffer[off++] - 0xb8]);
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else
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ENTRY_UNPACK(table, kind, table[(buffer[off] >> 3) & 7]);
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}
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}
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if (kind == ENTRY_TABLE8E && LIKELY(off < len))
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ENTRY_UNPACK(table, kind, table[buffer[off++] & 7]);
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// For VEX prefix, we have to distinguish between VEX.W and VEX.L which may
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// For VEX prefix, we have to distinguish between VEX.W and VEX.L which may
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// be part of the opcode.
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// be part of the opcode.
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@@ -202,8 +202,8 @@ class EntryKind(Enum):
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NONE = 0
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NONE = 0
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INSTR = 1
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INSTR = 1
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TABLE256 = 2
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TABLE256 = 2
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TABLE8 = 3
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TABLE16 = 3
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TABLE72 = 4
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TABLE8E = 4
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TABLE_PREFIX = 5
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TABLE_PREFIX = 5
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TABLE_VEX = 6
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TABLE_VEX = 6
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TABLE_ROOT = -1
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TABLE_ROOT = -1
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@@ -215,8 +215,8 @@ class TrieEntry(NamedTuple):
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TABLE_LENGTH = {
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TABLE_LENGTH = {
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EntryKind.TABLE256: 256,
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EntryKind.TABLE256: 256,
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EntryKind.TABLE8: 8,
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EntryKind.TABLE16: 16,
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EntryKind.TABLE72: 72,
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EntryKind.TABLE8E: 8,
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EntryKind.TABLE_PREFIX: 4,
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EntryKind.TABLE_PREFIX: 4,
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EntryKind.TABLE_VEX: 4,
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EntryKind.TABLE_VEX: 4,
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EntryKind.TABLE_ROOT: 8,
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EntryKind.TABLE_ROOT: 8,
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@@ -296,10 +296,18 @@ class Opcode(NamedTuple):
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prefix_val = ["NP", "66", "F3", "F2"].index(self.prefix)
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prefix_val = ["NP", "66", "F3", "F2"].index(self.prefix)
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opcode.append((EntryKind.TABLE_PREFIX, [prefix_val]))
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opcode.append((EntryKind.TABLE_PREFIX, [prefix_val]))
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if self.opcext:
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if self.opcext:
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opcext_kind = [EntryKind.TABLE8, EntryKind.TABLE72][self.opcext[0]]
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opcext_val = self.opcext[1]
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opcext_val = self.opcext[1] - (0 if self.opcext[1] < 8 else 0xb8)
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if not self.opcext[0]:
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opcode.append((opcext_kind, [opcext_val]))
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opcode.append((EntryKind.TABLE16, [opcext_val, opcext_val | 8]))
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if self.extended:
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elif opcext_val < 8:
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opcode.append((EntryKind.TABLE16, [opcext_val]))
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else:
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opcode.append((EntryKind.TABLE16, [((opcext_val - 0xc0) >> 3) | 8]))
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if not self.extended:
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opcode.append((EntryKind.TABLE8E, [opcext_val & 7]))
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else:
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opcode.append((EntryKind.TABLE8E, list(range(8))))
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if self.extended and not self.opcext:
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last_type, last_indices = opcode[-1]
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last_type, last_indices = opcode[-1]
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opcode[-1] = last_type, [last_indices[0] + i for i in range(8)]
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opcode[-1] = last_type, [last_indices[0] + i for i in range(8)]
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if self.vexl in ("0", "1") or self.rexw in ("0", "1"):
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if self.vexl in ("0", "1") or self.rexw in ("0", "1"):
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@@ -320,8 +328,10 @@ def format_opcode(opcode):
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prefix += ["", "VEX."][byte >> 2]
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prefix += ["", "VEX."][byte >> 2]
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elif kind == EntryKind.TABLE256:
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elif kind == EntryKind.TABLE256:
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opcode_string += "{:02x}".format(byte)
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opcode_string += "{:02x}".format(byte)
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elif kind in (EntryKind.TABLE8, EntryKind.TABLE72):
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elif kind == EntryKind.TABLE16:
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opcode_string += "/{:x}".format(byte)
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opcode_string += "/{:x}{}".format(byte & 7, "mr"[byte >> 3])
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elif kind == EntryKind.TABLE8E:
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opcode_string += "+rm={:x}".format(byte)
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elif kind == EntryKind.TABLE_PREFIX:
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elif kind == EntryKind.TABLE_PREFIX:
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if byte & 4:
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if byte & 4:
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prefix += "VEX."
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prefix += "VEX."
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