instrs: Add AVX512-FP16 instructions
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@@ -339,7 +339,7 @@ class EntryKind(Enum):
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opcode_regex = re.compile(
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r"^(?:(?P<prefixes>(?P<vex>E?VEX\.)?(?P<legacy>NP|66|F2|F3|NFx)\." +
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r"(?:W(?P<rexw>[01])\.)?(?:L(?P<vexl>0|1|12|2|IG)\.)?))?" +
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r"(?P<escape>0f38|0f3a|0f|)" +
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r"(?P<escape>0f38|0f3a|0f|M[56]\.|)" +
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r"(?P<opcode>[0-9a-f]{2})" +
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r"(?:/(?P<modreg>[0-7]|[rm]|[0-7][rm])|(?P<opcext>[c-f][0-9a-f]))?(?P<extended>\+)?$")
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@@ -370,7 +370,7 @@ class Opcode(NamedTuple):
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return cls(
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prefix=match.group("legacy"),
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escape=["", "0f", "0f38", "0f3a"].index(match.group("escape")),
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escape=["", "0f", "0f38", "0f3a", "M4.", "M5.", "M6."].index(match.group("escape")),
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opc=int(match.group("opcode"), 16),
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extended=match.group("extended") is not None,
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modreg=modreg,
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@@ -407,10 +407,13 @@ def verifyOpcodeDesc(opcode, desc):
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raise Exception(f"missing memory operand {opcode}, {desc}")
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# From Intel SDM
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bcst, evexw, vszs = {
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"TUPLE_FULL_16": (2, "0", ( 16, 32, 64)),
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"TUPLE_FULL_32": (4, "0", ( 16, 32, 64)),
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"TUPLE_FULL_64": (8, "1", ( 16, 32, 64)),
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"TUPLE_HALF_16": (2, "0", ( 8, 16, 32)),
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"TUPLE_HALF_32": (4, "0", ( 8, 16, 32)),
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"TUPLE_HALF_64": (8, "1", ( 8, 16, 32)),
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"TUPLE_QUARTER_16": (2, "0", ( 4, 8, 16)),
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"TUPLE_FULL_MEM": (None, None, ( 16, 32, 64)),
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"TUPLE_HALF_MEM": (None, None, ( 8, 16, 32)),
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"TUPLE_QUARTER_MEM": (None, None, ( 4, 8, 16)),
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@@ -449,7 +452,7 @@ class Trie:
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EntryKind.TABLE_PREFIX, EntryKind.TABLE16,
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EntryKind.TABLE8E, EntryKind.TABLE_VEX)
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TABLE_LENGTH = {
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EntryKind.TABLE_ROOT: 12,
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EntryKind.TABLE_ROOT: 16,
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EntryKind.TABLE256: 256,
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EntryKind.TABLE_PREFIX: 4,
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EntryKind.TABLE16: 16,
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