instrs: Fix decoding of XCHG r8, rax
Opcode 90 is only a NOP if there is no REX.B.
This commit is contained in:
15
decode.c
15
decode.c
@@ -608,6 +608,21 @@ fd_decode(const uint8_t* buffer, size_t len_sz, int mode_int, uintptr_t address,
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}
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}
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if (instr->type == FDI_XCHG_NOP)
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{
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// Only 4890, 90, and 6690 are true NOPs.
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if (instr->operands[0].reg == 0 && instr->operands[1].reg == 0)
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{
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instr->operands[0].type = FD_OT_NONE;
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instr->operands[1].type = FD_OT_NONE;
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instr->type = FDI_NOP;
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}
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else
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{
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instr->type = FDI_XCHG;
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}
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}
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if ((prefixes & PREFIX_LOCK) && !desc->lock)
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return FD_ERR_UD;
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if ((prefixes & PREFIX_LOCK) && instr->operands[0].type != FD_OT_MEM)
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@@ -143,7 +143,9 @@
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8d RM GP GP - - LEA MUSTMEM
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8e RM SREG GP - - MOV_G2S
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8f/0 M GP - - - POP DEF64
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90 NP - - - - NOP
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# Against frequent belief, only, XCHG (r/e)AX, (r)AX with 90 is NOP.
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# As a lacking REX.B cannot be specified here, this is hardcoded.
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90 OA GP GP - - XCHG_NOP
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91 OA GP GP - - XCHG
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92 OA GP GP - - XCHG
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93 OA GP GP - - XCHG
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@@ -11,3 +11,6 @@ decode f2660f10c1 [SSE_MOVSD reg8:r0 reg8:r1]
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decode f3660f10c1 [SSE_MOVSS reg4:r0 reg4:r1]
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decode f3f2660f10c1 [SSE_MOVSD reg8:r0 reg8:r1]
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decode f266f3660f10c1 [SSE_MOVSS reg4:r0 reg4:r1]
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decode64 4890 [NOP]
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decode64 4990 [XCHG reg8:r8 reg8:r0]
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decode64 6690 [NOP]
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