instrs: Add reserved NOP/PREFETCH as weak opcodes
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26
instrs.txt
26
instrs.txt
@@ -347,11 +347,8 @@ F2.0f09 NP - - - - WBINVD
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0f0d/0m M MEM8 - - - PREFETCH
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0f0d/1m M MEM8 - - - PREFETCHW
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0f0d/2m M MEM8 - - - PREFETCHWT1
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0f0d/3m M MEM8 - - - RESERVED_PREFETCH
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0f0d/4m M MEM8 - - - RESERVED_PREFETCH
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0f0d/5m M MEM8 - - - RESERVED_PREFETCH
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0f0d/6m M MEM8 - - - RESERVED_PREFETCH
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0f0d/7m M MEM8 - - - RESERVED_PREFETCH
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# All other slots are reserved, AMD maps them to /0
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*0f0d/m M MEM8 - - - RESERVED_PREFETCH ONLYAMD
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0f0e NP - - - - FEMMS ONLYAMD
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# TODO: actually decode 3DNow! instructions. Given that 3DNow! no longer exists,
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# this is unlikely to happen, though.
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@@ -360,15 +357,16 @@ F2.0f09 NP - - - - WBINVD
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0f18/1m M MEM8 - - - PREFETCHT0
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0f18/2m M MEM8 - - - PREFETCHT1
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0f18/3m M MEM8 - - - PREFETCHT2
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0f18/0r M GP - - - RESERVED_NOP
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0f18/1r M GP - - - RESERVED_NOP
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0f18/2r M GP - - - RESERVED_NOP
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0f18/3r M GP - - - RESERVED_NOP
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0f18/4 M GP - - - RESERVED_NOP
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0f18/5 M GP - - - RESERVED_NOP
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0f18/6 M GP - - - RESERVED_NOP
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0f18/7 M GP - - - RESERVED_NOP
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0f1f M GP - - - NOP
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# Reserved NOPs are weak, they can be overridden by other instructions.
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*0f18 MR GP GP - - RESERVED_NOP
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*0f19 MR GP GP - - RESERVED_NOP
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*0f1a MR GP GP - - RESERVED_NOP
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*0f1b MR GP GP - - RESERVED_NOP
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*0f1c MR GP GP - - RESERVED_NOP
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*0f1d MR GP GP - - RESERVED_NOP
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*0f1e MR GP GP - - RESERVED_NOP
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*0f1f MR GP GP - - RESERVED_NOP
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0f1f/0 M GP - - - NOP
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0f20 MR GP CR - - MOV_CR DEF64 IGN66
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0f21 MR GP DR - - MOV_DR DEF64 IGN66
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0f22 RM CR GP - - MOV_CR DEF64 IGN66
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