decode: Handle GPH, NOP and 3DNow in legacy block
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62
decode.c
62
decode.c
@@ -91,6 +91,7 @@ struct InstrDesc
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#define DESC_LOCK(desc) (((desc)->operand_indices >> 11) & 1)
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#define DESC_VSIB(desc) (((desc)->operand_indices >> 15) & 1)
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#define DESC_OPSIZE(desc) (((desc)->reg_types >> 11) & 7)
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#define DESC_LEGACY(desc) (((desc)->operand_sizes >> 8) & 1)
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#define DESC_SIZE_FIX1(desc) (((desc)->operand_sizes >> 10) & 7)
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#define DESC_SIZE_FIX2(desc) (((desc)->operand_sizes >> 13) & 3)
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#define DESC_INSTR_WIDTH(desc) (((desc)->operand_sizes >> 15) & 1)
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@@ -400,9 +401,7 @@ direct:
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unsigned op_size;
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unsigned op_size_alt = 0;
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if (!(DESC_OPSIZE(desc) & 4)) {
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if (DESC_OPSIZE(desc) == 1)
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op_size = 1;
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else if (mode == DECODE_64)
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if (mode == DECODE_64)
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op_size = ((prefix_rex & PREFIX_REXW) || DESC_OPSIZE(desc) == 3) ? 4 :
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UNLIKELY(prefixes[PF_66] && !DESC_IGN66(desc)) ? 2 :
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DESC_OPSIZE(desc) ? 4 :
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@@ -632,7 +631,7 @@ direct:
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// 2 = memory, address-sized, used for mov with moffs operand
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FdOp* operand = &instr->operands[DESC_IMM_IDX(desc)];
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operand->type = FD_OT_MEM;
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operand->size = op_size;
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operand->size = operand_sizes[(desc->operand_sizes >> 6) & 3];
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operand->reg = FD_REG_NONE;
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operand->misc = FD_REG_NONE;
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@@ -722,31 +721,6 @@ direct:
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}
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}
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if (instr->type == FDI_XCHG_NOP)
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{
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// Only 4890, 90, and 6690 are true NOPs.
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if (instr->operands[0].reg == 0 && instr->operands[1].reg == 0)
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{
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instr->operands[0].type = FD_OT_NONE;
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instr->operands[1].type = FD_OT_NONE;
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instr->type = FDI_NOP;
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}
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else
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{
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instr->type = FDI_XCHG;
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}
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}
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if (UNLIKELY(instr->type == FDI_3DNOW))
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{
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unsigned opc3dn = instr->imm;
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if (opc3dn & 0x40)
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return FD_ERR_UD;
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uint64_t msk = opc3dn & 0x80 ? 0x88d144d144d14400 : 0x30003000;
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if (!(msk >> (opc3dn & 0x3f) & 1))
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return FD_ERR_UD;
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}
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skip_modrm:
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if (UNLIKELY(prefixes[PF_LOCK])) {
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if (!DESC_LOCK(desc) || instr->operands[0].type != FD_OT_MEM)
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@@ -754,7 +728,10 @@ skip_modrm:
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instr->flags |= FD_FLAG_LOCK;
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}
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if (UNLIKELY(op_size == 1 || instr->type == FDI_MOVSX || instr->type == FDI_MOVZX)) {
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if (UNLIKELY(DESC_LEGACY(desc))) {
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// Without REX prefix, convert one-byte GP regs to high-byte regs
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// This actually only applies to SZ8/MOVSX/MOVZX; but no VEX-encoded
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// instructions have a byte-sized GP register in the first two operands.
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if (!(prefix_rex & PREFIX_REX)) {
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for (int i = 0; i < 2; i++) {
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FdOp* operand = &instr->operands[i];
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@@ -765,10 +742,33 @@ skip_modrm:
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operand->misc = FD_RT_GPH;
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}
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}
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if (instr->type == FDI_XCHG_NOP) {
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// Only 4890, 90, and 6690 are true NOPs.
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if (instr->operands[0].reg == 0 && instr->operands[1].reg == 0) {
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instr->operands[0].type = FD_OT_NONE;
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instr->operands[1].type = FD_OT_NONE;
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instr->type = FDI_NOP;
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} else {
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instr->type = FDI_XCHG;
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}
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}
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if (UNLIKELY(instr->type == FDI_3DNOW)) {
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unsigned opc3dn = instr->imm;
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if (opc3dn & 0x40)
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return FD_ERR_UD;
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uint64_t msk = opc3dn & 0x80 ? 0x88d144d144d14400 : 0x30003000;
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if (!(msk >> (opc3dn & 0x3f) & 1))
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return FD_ERR_UD;
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}
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instr->operandsz = 0;
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} else {
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instr->operandsz = UNLIKELY(DESC_INSTR_WIDTH(desc)) ? op_size - 1 : 0;
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}
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instr->size = off;
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instr->operandsz = UNLIKELY(DESC_INSTR_WIDTH(desc)) ? op_size - 1 : 0;
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return off;
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}
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