From 7171624750157e725e00d105da6eb0d45365c496 Mon Sep 17 00:00:00 2001
From: Chris Fallin <chris@cfallin.org>
Date: Wed, 26 May 2021 21:35:43 -0700
Subject: [PATCH] Don't generate r1->scratch,scratch-r1 sequence for cyclic
 moves of r1->r1 that are generated to change vreg ownership and keep the
 checker happy. Seems to eliminate a bit of braindeadness and improve bz2 by
 ~5-10%.

---
 src/ion/mod.rs | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/src/ion/mod.rs b/src/ion/mod.rs
index 105b964..ed2b7ce 100644
--- a/src/ion/mod.rs
+++ b/src/ion/mod.rs
@@ -4254,11 +4254,18 @@ impl<'a, F: Function> Env<'a, F> {
             // regs, but this seems simpler.)
             let mut int_moves: SmallVec<[InsertedMove; 8]> = smallvec![];
             let mut float_moves: SmallVec<[InsertedMove; 8]> = smallvec![];
+            let mut self_moves: SmallVec<[InsertedMove; 8]> = smallvec![];
 
             for m in moves {
                 if m.from_alloc.is_reg() && m.to_alloc.is_reg() {
                     assert_eq!(m.from_alloc.class(), m.to_alloc.class());
                 }
+                if m.from_alloc == m.to_alloc {
+                    if m.to_vreg.is_some() {
+                        self_moves.push(m.clone());
+                    }
+                    continue;
+                }
                 match m.from_alloc.class() {
                     RegClass::Int => {
                         int_moves.push(m.clone());
@@ -4269,6 +4276,18 @@ impl<'a, F: Function> Env<'a, F> {
                 }
             }
 
+            for m in &self_moves {
+                self.add_edit(
+                    pos,
+                    prio,
+                    Edit::Move {
+                        from: m.from_alloc,
+                        to: m.to_alloc,
+                        to_vreg: m.to_vreg,
+                    },
+                );
+            }
+
             for &(regclass, moves) in
                 &[(RegClass::Int, &int_moves), (RegClass::Float, &float_moves)]
             {