Addressed more review comments.
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@@ -17,6 +17,16 @@
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//! conceptually generates a symbolic value "Vn" when storing to (or
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//! modifying) a virtual register.
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//!
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//! These symbolic values are precise but partial: in other words, if
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//! a physical register is described as containing a virtual register
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//! at a program point, it must actually contain the value of this
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//! register (modulo any analysis bugs); but it may resolve to
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//! `Conflicts` even in cases where one *could* statically prove that
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//! it contains a certain register, because the analysis is not
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//! perfectly path-sensitive or value-sensitive. However, all
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//! assignments *produced by our register allocator* should be
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//! analyzed fully precisely.
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//!
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//! Operand constraints (fixed register, register, any) are also checked
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//! at each operand.
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//!
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@@ -24,7 +34,8 @@
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//!
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//! - map of: Allocation -> lattice value (top > Vn symbols (unordered) > bottom)
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//!
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//! And the transfer functions for instructions are:
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//! And the transfer functions for instructions are (where `A` is the
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//! above map from allocated physical registers to symbolic values):
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//!
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//! - `Edit::Move` inserted by RA: [ alloc_d := alloc_s ]
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//!
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@@ -36,7 +47,7 @@
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//! machine code, but we include their allocations so that this
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//! checker can work)
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//!
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//! A[A_i] := meet(A_j, A_k, ...)
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//! A[A_i] := meet(A[A_j], A[A_k], ...)
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//!
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//! - statement in pre-regalloc function [ V_i := op V_j, V_k, ... ]
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//! with allocated form [ A_i := op A_j, A_k, ... ]
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