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Simplify the internal representation of PReg

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This commit is contained in:
Amanieu d'Antras
2021-11-28 18:49:47 +00:00
parent 870e4729e1
commit 38ffc479c2
2 changed files with 14 additions and 18 deletions
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2
src/ion/liveranges.rs
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@@ -99,7 +99,7 @@ impl<'a, F: Function> Env<'a, F> {
pub fn create_pregs_and_vregs(&mut self) { pub fn create_pregs_and_vregs(&mut self) {
// Create PRegs from the env. // Create PRegs from the env.
self.pregs.resize( self.pregs.resize(
PReg::MAX_INDEX, PReg::NUM_INDEX,
PRegData { PRegData {
reg: PReg::invalid(), reg: PReg::invalid(),
allocations: LiveRangeSet::new(), allocations: LiveRangeSet::new(),

30
src/lib.rs
View File

@@ -65,14 +65,13 @@ pub enum RegClass {
/// integer registers and indices 64..=127 are the 64 float registers. /// integer registers and indices 64..=127 are the 64 float registers.
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)] #[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
pub struct PReg { pub struct PReg {
hw_enc: u8, bits: u8,
class: RegClass,
} }
impl PReg { impl PReg {
pub const MAX_BITS: usize = 6; pub const MAX_BITS: usize = 6;
pub const MAX: usize = (1 << Self::MAX_BITS) - 1; pub const MAX: usize = (1 << Self::MAX_BITS) - 1;
pub const MAX_INDEX: usize = 1 << (Self::MAX_BITS + 1); // including RegClass bit pub const NUM_INDEX: usize = 1 << (Self::MAX_BITS + 1); // including RegClass bit
/// Create a new PReg. The `hw_enc` range is 6 bits. /// Create a new PReg. The `hw_enc` range is 6 bits.
#[inline(always)] #[inline(always)]
@@ -86,22 +85,24 @@ impl PReg {
let _ = HW_ENC_MUST_BE_IN_BOUNDS[hw_enc]; let _ = HW_ENC_MUST_BE_IN_BOUNDS[hw_enc];
PReg { PReg {
hw_enc: hw_enc as u8, bits: ((class as u8) << Self::MAX_BITS) | (hw_enc as u8),
class,
} }
} }
/// The physical register number, as encoded by the ISA for the particular register class. /// The physical register number, as encoded by the ISA for the particular register class.
#[inline(always)] #[inline(always)]
pub fn hw_enc(self) -> usize { pub fn hw_enc(self) -> usize {
let hw_enc = self.hw_enc as usize; self.bits as usize & Self::MAX
hw_enc
} }
/// The register class. /// The register class.
#[inline(always)] #[inline(always)]
pub fn class(self) -> RegClass { pub fn class(self) -> RegClass {
self.class if self.bits & (1 << Self::MAX_BITS) == 0 {
RegClass::Int
} else {
RegClass::Float
}
} }
/// Get an index into the (not necessarily contiguous) index space of /// Get an index into the (not necessarily contiguous) index space of
@@ -109,20 +110,15 @@ impl PReg {
/// all PRegs and index it efficiently. /// all PRegs and index it efficiently.
#[inline(always)] #[inline(always)]
pub fn index(self) -> usize { pub fn index(self) -> usize {
((self.class as u8 as usize) << Self::MAX_BITS) | (self.hw_enc as usize) self.bits as usize
} }
/// Construct a PReg from the value returned from `.index()`. /// Construct a PReg from the value returned from `.index()`.
#[inline(always)] #[inline(always)]
pub fn from_index(index: usize) -> Self { pub fn from_index(index: usize) -> Self {
let class = (index >> Self::MAX_BITS) & 1; PReg {
let class = match class { bits: (index & (Self::NUM_INDEX - 1)) as u8,
0 => RegClass::Int, }
1 => RegClass::Float,
_ => unreachable!(),
};
let index = index & Self::MAX;
PReg::new(index, class)
} }
/// Return the "invalid PReg", which can be used to initialize /// Return the "invalid PReg", which can be used to initialize