Alexis Engelke
0e0b03f839
format: Drop fd_strplcpy
2022-11-25 14:58:58 +01:00
Alexis Engelke
6facb5f08c
format: Use logarithmic address/operand sizes
...
This simplifies register and pointer size formatting.
2022-11-25 14:50:16 +01:00
Ole André Vadla Ravnås
a05d52fdd0
windows: Add support for building with MSVC
2022-11-01 19:22:43 +01:00
Alexis Engelke
2fd83903cf
meson,parseinstrs: Make decode and encode optional
2022-02-20 17:15:21 +01:00
Alexis Engelke
f9a773c619
format: Fix unused parameter warning
2022-01-06 09:56:01 +01:00
Alexis Engelke
38a7a5f075
format: Fix cast alignment warning for __m128i
2022-01-06 09:55:29 +01:00
Alexis Engelke
7df4c9542f
format: Reduce size of register name table
2021-06-13 15:59:44 +02:00
Alexis Engelke
99a1fbeee1
format: Major refactoring for performance
2021-05-30 14:25:38 +02:00
Alexis Engelke
f17d84cee6
format: Emit XACQUIRE/XRELEASE
...
As CMPXCHGD has a mandatory prefix table, it is absolutely necessary
that the presence of any tables does not modify any decoding state.
2021-01-23 14:35:08 +01:00
Alexis Engelke
7919b8115a
format: Emit REP/REPNZ only for string instruction
2021-01-23 14:29:29 +01:00
Alexis Engelke
95371637ea
format: Add names for bound registers
2021-01-23 14:05:42 +01:00
Alexis Engelke
8561d77c91
format: Minor non-functional changes
2021-01-10 18:55:05 +01:00
Alexis Engelke
9245a97248
instrs: Add several AMD-only instructions
...
- 3DNow! instructions have a trailing immediate byte which indicates the
opcode. Decoding this with the existing table structure requires more
effort (in particular, a new lookup table after decoding ModRM would
be required). Given that AMD even removed 3DNow! over 10 years ago, it
appears unlikely that this will ever be fully supported. Adding the
RMI-encoded pseudo-instruction "3DNOW" just to support that opcode.
- FEMMS is a legacy 3DNow! instruction.
- EXTRQ/INSERTQ are instructions with an "unusual" encoding and
operation mode. This is another instance of 16-bit immediates.
- SVM (AMD's variant of VMX) and SNP instructions are AMD-only.
2021-01-10 15:18:44 +01:00
Alexis Engelke
51072cac9c
format: Generalize ENTER/JMPF/CALLF op. formatting
2021-01-10 15:15:30 +01:00
Alexis Engelke
862b6d285c
instrs: Minor operand size fixes
2021-01-10 14:13:44 +01:00
Alexis Engelke
dd4263b169
instrs: Support far jumps/calls encoded target
2021-01-10 12:31:07 +01:00
Alexis Engelke
111769832f
format: Properly output VSIB encodings
2021-01-08 10:37:13 +01:00
Alexis Engelke
44808e7b1a
format: Format instructions with Intel syntax
2021-01-03 21:18:57 +01:00
Alexis Engelke
64a9984fa0
format: Add function fdi_name
2020-12-12 16:24:17 +01:00
Alexis Engelke
9b6caeb2ae
parseinstrs: Write mnemonics to separate file
2020-07-04 14:35:51 +02:00
Alexis Engelke
8716bd1991
format: Handle offset operands properly
2020-06-14 14:01:14 +02:00
Alexis Engelke
bb3c7a4a4f
Fix alignment warnings from Clang
2019-08-18 18:13:39 +02:00
Alexis Engelke
69ac42c11f
Fix format.c for recent file name change
2019-06-16 10:18:41 +02:00
Alexis Engelke
e9878785da
Replace FD_OP with FD_OT to avoid macro collision
2019-02-03 20:31:27 +01:00
Alexis Engelke
3abf29d63e
Major rework of API and improved documentation
2019-01-23 20:03:40 +01:00
Alexis Engelke
8fdfe53822
Output more available information in formatter
...
The formatter now includes the following information:
- Segment overrides
- Address-size overrides
- REP/REPNZ prefixes
- LOCK prefix
- High-byte registers (determined using presence of REX prefix)
2019-01-13 20:38:15 +01:00
Alexis Engelke
80458e3288
Reduce space required by instruction width
2019-01-13 14:26:26 +01:00
Alexis Engelke
a3f77dbf49
Initial commit
2018-04-08 13:45:13 +00:00
