diff --git a/decode-test.c b/decode-test.c index b21d757..b4c9ca0 100644 --- a/decode-test.c +++ b/decode-test.c @@ -619,6 +619,39 @@ main(int argc, char** argv) TEST("\xc4\xe2\x71\x53\xc2", "vpdpwssds xmm0, xmm1, xmm2"); TEST("\xc4\xe2\x75\x53\xc2", "vpdpwssds ymm0, ymm1, ymm2"); + TEST("\xc4\xe2\x78\xb0\xc8", "UD"); // Must have memory operand + TEST32("\xc4\xe2\x78\xb0\x08", "vcvtneoph2ps xmm1, xmmword ptr [eax]"); + TEST64("\xc4\xe2\x78\xb0\x08", "vcvtneoph2ps xmm1, xmmword ptr [rax]"); + TEST32("\xc4\xe2\x7c\xb0\x08", "vcvtneoph2ps ymm1, ymmword ptr [eax]"); + TEST64("\xc4\xe2\x7c\xb0\x08", "vcvtneoph2ps ymm1, ymmword ptr [rax]"); + TEST("\xc4\xe2\x79\xb0\xc8", "UD"); // Must have memory operand + TEST32("\xc4\xe2\x79\xb0\x08", "vcvtneeph2ps xmm1, xmmword ptr [eax]"); + TEST64("\xc4\xe2\x79\xb0\x08", "vcvtneeph2ps xmm1, xmmword ptr [rax]"); + TEST32("\xc4\xe2\x7d\xb0\x08", "vcvtneeph2ps ymm1, ymmword ptr [eax]"); + TEST64("\xc4\xe2\x7d\xb0\x08", "vcvtneeph2ps ymm1, ymmword ptr [rax]"); + TEST("\xc4\xe2\x7a\xb0\xc8", "UD"); // Must have memory operand + TEST32("\xc4\xe2\x7a\xb0\x08", "vcvtneebf162ps xmm1, xmmword ptr [eax]"); + TEST64("\xc4\xe2\x7a\xb0\x08", "vcvtneebf162ps xmm1, xmmword ptr [rax]"); + TEST32("\xc4\xe2\x7e\xb0\x08", "vcvtneebf162ps ymm1, ymmword ptr [eax]"); + TEST64("\xc4\xe2\x7e\xb0\x08", "vcvtneebf162ps ymm1, ymmword ptr [rax]"); + TEST("\xc4\xe2\x7b\xb0\xc8", "UD"); // Must have memory operand + TEST32("\xc4\xe2\x7b\xb0\x08", "vcvtneobf162ps xmm1, xmmword ptr [eax]"); + TEST64("\xc4\xe2\x7b\xb0\x08", "vcvtneobf162ps xmm1, xmmword ptr [rax]"); + TEST32("\xc4\xe2\x7f\xb0\x08", "vcvtneobf162ps ymm1, ymmword ptr [eax]"); + TEST64("\xc4\xe2\x7f\xb0\x08", "vcvtneobf162ps ymm1, ymmword ptr [rax]"); + TEST("\xc4\xe2\x79\xb1\xc8", "UD"); // Must have memory operand + TEST32("\xc4\xe2\x79\xb1\x08", "vbcstnesh2ps xmm1, word ptr [eax]"); + TEST64("\xc4\xe2\x79\xb1\x08", "vbcstnesh2ps xmm1, word ptr [rax]"); + TEST32("\xc4\xe2\x7d\xb1\x08", "vbcstnesh2ps ymm1, word ptr [eax]"); + TEST64("\xc4\xe2\x7d\xb1\x08", "vbcstnesh2ps ymm1, word ptr [rax]"); + TEST("\xc4\xe2\x7a\xb1\xc8", "UD"); // Must have memory operand + TEST32("\xc4\xe2\x7a\xb1\x08", "vbcstnebf162ps xmm1, word ptr [eax]"); + TEST64("\xc4\xe2\x7a\xb1\x08", "vbcstnebf162ps xmm1, word ptr [rax]"); + TEST32("\xc4\xe2\x7e\xb1\x08", "vbcstnebf162ps ymm1, word ptr [eax]"); + TEST64("\xc4\xe2\x7e\xb1\x08", "vbcstnebf162ps ymm1, word ptr [rax]"); + TEST("\xc4\xe2\x7a\x72\xc1", "vcvtneps2bf16 xmm0, xmm1"); + TEST("\xc4\xe2\x7e\x72\xc1", "vcvtneps2bf16 xmm0, ymm1"); + TEST("\xc4\xe2\x71\x92\xc0", "UD"); // Must have memory operand TEST("\xc4\xe2\x71\x92\x00", "UD"); // Must have SIB byte TEST("\xc4\xe2\x71\x92\x05\x00\x00\x00\x00", "UD"); // Must have SIB byte diff --git a/encode-test.inc b/encode-test.inc index cebac95..f2b2681 100644 --- a/encode-test.inc +++ b/encode-test.inc @@ -339,6 +339,21 @@ TEST("\xc4\xe2\x75\x52\xc2", VPDPWSSD256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2); TEST("\xc4\xe2\x71\x53\xc2", VPDPWSSDS128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2); TEST("\xc4\xe2\x75\x53\xc2", VPDPWSSDS256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2); +TEST("\xc4\xe2\x78\xb0\x08", VCVTNEOPH2PS128rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7c\xb0\x08", VCVTNEOPH2PS256rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x79\xb0\x08", VCVTNEEPH2PS128rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7d\xb0\x08", VCVTNEEPH2PS256rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7a\xb0\x08", VCVTNEEBF162PS128rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7e\xb0\x08", VCVTNEEBF162PS256rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7b\xb0\x08", VCVTNEOBF162PS128rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7f\xb0\x08", VCVTNEOBF162PS256rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x79\xb1\x08", VBCSTNESH2PS128rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7d\xb1\x08", VBCSTNESH2PS256rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7a\xb1\x08", VBCSTNEBF162PS128rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7e\xb1\x08", VBCSTNEBF162PS256rm, 0, FE_XMM1, FE_MEM(FE_AX, 0, FE_NOREG, 0)); +TEST("\xc4\xe2\x7a\x72\xc1", VCVTNEPS2BF16_128rr, 0, FE_XMM0, FE_XMM1); +TEST("\xc4\xe2\x7e\x72\xc1", VCVTNEPS2BF16_256rr, 0, FE_XMM0, FE_XMM1); + // Test ModRM encoding TEST("\x01\x00", ADD32mr, 0, FE_MEM(FE_AX, 0, FE_NOREG, 0), FE_AX); TEST("\x01\x04\x24", ADD32mr, 0, FE_MEM(FE_SP, 0, FE_NOREG, 0), FE_AX); diff --git a/instrs.txt b/instrs.txt index 290cd23..179862e 100644 --- a/instrs.txt +++ b/instrs.txt @@ -1606,6 +1606,16 @@ VEX.F2.W0.0f3851 RVM Vx Hx Wx - VPDPBSSDS F=VNNI-INT8 VEX.66.W0.0f3852 RVM Vx Hx Wx - VPDPWSSD F=VNNI VEX.66.W0.0f3853 RVM Vx Hx Wx - VPDPWSSDS F=VNNI +# AVX-NE-CONVERT +VEX.NP.W0.0f38b0/m RM Vx Mx - - VCVTNEOPH2PS F=AVX-NE-CONVERT +VEX.66.W0.0f38b0/m RM Vx Mx - - VCVTNEEPH2PS F=AVX-NE-CONVERT +VEX.F3.W0.0f38b0/m RM Vx Mx - - VCVTNEEBF162PS F=AVX-NE-CONVERT +VEX.F2.W0.0f38b0/m RM Vx Mx - - VCVTNEOBF162PS F=AVX-NE-CONVERT +VEX.66.W0.0f38b1/m RM Vx Mw - - VBCSTNESH2PS F=AVX-NE-CONVERT +VEX.F3.W0.0f38b1/m RM Vx Mw - - VBCSTNEBF162PS F=AVX-NE-CONVERT +# TODO: Vdq is actually half the vector size +VEX.F3.W0.0f3872 RM Vdq Wps - - VCVTNEPS2BF16 F=AVX-NE-CONVERT + # HRESET #F3.0f3af0c0 IA Ib Rd - - HRESET F=HRESET