From dff78c5a860a555365679e3bd66c7e48e36a7f18 Mon Sep 17 00:00:00 2001 From: Alexis Engelke Date: Sat, 27 Apr 2019 11:16:09 +0200 Subject: [PATCH] Support VSIB encoding --- decode.c | 8 +++++--- instrs.txt | 17 ++++++++--------- parseinstrs.py | 2 ++ 3 files changed, 15 insertions(+), 12 deletions(-) diff --git a/decode.c b/decode.c index b5acec5..29d5a21 100644 --- a/decode.c +++ b/decode.c @@ -1,4 +1,5 @@ +#include #include #include @@ -176,7 +177,7 @@ out: static int decode_modrm(const uint8_t* buffer, int len, DecodeMode mode, FdInstr* instr, - PrefixSet prefixes, FdOp* out_o1, FdOp* out_o2) + PrefixSet prefixes, bool vsib, FdOp* out_o1, FdOp* out_o2) { int off = 0; @@ -231,7 +232,7 @@ decode_modrm(const uint8_t* buffer, int len, DecodeMode mode, FdInstr* instr, out_o1->type = FD_OT_MEM; instr->idx_scale = scale; - instr->idx_reg = idx == 4 ? FD_REG_NONE : idx; + instr->idx_reg = !vsib && idx == 4 ? FD_REG_NONE : idx; // RIP-relative addressing only if SIB-byte is absent if (mod == 0 && rm == 5 && mode == DECODE_64) @@ -275,6 +276,7 @@ struct InstrDesc uint8_t gp_instr_width : 1; uint8_t gp_fixed_operand_size : 3; uint8_t lock : 1; + uint8_t vsib : 1; } __attribute__((packed)); #define DESC_HAS_MODRM(desc) (((desc)->operand_indices & (3 << 0)) != 0) @@ -448,7 +450,7 @@ fd_decode(const uint8_t* buffer, size_t len_sz, int mode_int, uintptr_t address, operand2 = &instr->operands[DESC_MODREG_IDX(desc)]; retval = decode_modrm(buffer + off, len - off, mode, instr, prefixes, - operand1, operand2); + desc->vsib, operand1, operand2); if (UNLIKELY(retval < 0)) return -1; off += retval; diff --git a/instrs.txt b/instrs.txt index e1c44eb..fc2b30c 100644 --- a/instrs.txt +++ b/instrs.txt @@ -979,15 +979,14 @@ VEX.66.W0.0f388c RVM XMM XMM XMM - VPMASKMOVD VEX.66.W1.0f388c RVM XMM XMM XMM - VPMASKMOVQ VEX.66.W0.0f388e MVR XMM XMM XMM - VPMASKMOVD VEX.66.W1.0f388e MVR XMM XMM XMM - VPMASKMOVQ -# TODO: VSIB encoding -#VEX.66.W0.0f3890 RMV XMM XMM XMM - VPGATHERDD VSIB -#VEX.66.W1.0f3890 RMV XMM XMM XMM - VPGATHERDQ VSIB -#VEX.66.W0.0f3891 RMV XMM XMM XMM - VPGATHERQD VSIB -#VEX.66.W1.0f3891 RMV XMM XMM XMM - VPGATHERQQ VSIB -#VEX.66.W0.0f3892 RMV XMM XMM XMM - VGATHERDPS VSIB -#VEX.66.W1.0f3892 RMV XMM XMM XMM - VGATHERDPD VSIB -#VEX.66.W0.0f3893 RMV XMM XMM XMM - VGATHERQPS VSIB -#VEX.66.W1.0f3893 RMV XMM XMM XMM - VGATHERQPD VSIB +VEX.66.W0.0f3890 RMV XMM XMM XMM - VPGATHERDD VSIB +VEX.66.W1.0f3890 RMV XMM XMM XMM - VPGATHERDQ VSIB +VEX.66.W0.0f3891 RMV XMM XMM XMM - VPGATHERQD VSIB +VEX.66.W1.0f3891 RMV XMM XMM XMM - VPGATHERQQ VSIB +VEX.66.W0.0f3892 RMV XMM XMM XMM - VGATHERDPS VSIB +VEX.66.W1.0f3892 RMV XMM XMM XMM - VGATHERDPD VSIB +VEX.66.W0.0f3893 RMV XMM XMM XMM - VGATHERQPS VSIB +VEX.66.W1.0f3893 RMV XMM XMM XMM - VGATHERQPD VSIB VEX.66.W0.0f3896 RVM XMM XMM XMM - VFMADDADD132PS VEX.66.W1.0f3896 RVM XMM XMM XMM - VFMADDADD132PD VEX.66.W0.0f3897 RVM XMM XMM XMM - VFMSUBADD132PS diff --git a/parseinstrs.py b/parseinstrs.py index d80a798..533a991 100644 --- a/parseinstrs.py +++ b/parseinstrs.py @@ -38,6 +38,7 @@ InstrFlags = bitstruct("InstrFlags", [ "gp_instr_width:1", "gp_fixed_operand_size:3", "lock:1", + "vsib:1", ]) assert InstrFlags._encode_size <= 32 @@ -116,6 +117,7 @@ class InstrDesc(namedtuple("InstrDesc", "mnemonic,flags,encoding")): if "INSTR_WIDTH" in desc[6:]: flags.gp_instr_width = 1 if "IMM_8" in desc[6:]: flags.imm_byte = 1 if "LOCK" in desc[6:]: flags.lock = 1 + if "VSIB" in desc[6:]: flags.vsib = 1 return cls(desc[5], frozenset(desc[6:]), flags._encode()) def encode(self, mnemonics_lut):