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decode: Fix VEX + REX + legacy combinations

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This commit is contained in:
Alexis Engelke
2020-11-21 15:43:51 +01:00
parent 7f0bd4de8b
commit bbc3b34f71
2 changed files with 48 additions and 58 deletions
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3
tests/test_decode.c
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@@ -264,6 +264,8 @@ main(int argc, char** argv)
TEST("\x66\x0f\x71\xd0\x01", "[SSE_PSRLW reg16:r0 imm1:0x1]");
TEST("\x66\x0f\x71\x10\x01", "UD");
TEST32("\xc4\x00", "[LES reg4:r0 mem0:r0]");
TEST32("\xc5\x00", "[LDS reg4:r0 mem0:r0]");
TEST("\xc5\xf2\x2a\xc0", "[VCVTSI2SS reg16:r0 reg16:r1 reg4:r0]");
TEST("\xf3\xc5\xf2\x2a\xc0", "UD"); // VEX+REP
TEST("\xf2\xc5\xf2\x2a\xc0", "UD"); // VEX+REPNZ
@@ -271,6 +273,7 @@ main(int argc, char** argv)
TEST("\x66\xc5\xf2\x2a\xc0", "UD"); // VEX+66
TEST("\xf0\xc5\xf2\x2a\xc0", "UD"); // VEX+LOCK
TEST64("\x40\xc5\xf2\x2a\xc0", "UD"); // VEX+REX
TEST64("\x40\x26\xc5\xf2\x2a\xc0", "[es:VCVTSI2SS reg16:r0 reg16:r1 reg4:r0]"); // VEX+REX, but REX doesn't precede VEX
TEST("\xf3\x0f\x7e\x5c\x24\x08", "[SSE_MOVQ reg16:r3 mem8:r4+0x8]");
TEST32("\xc4\xe1\x00\x58\xc1", "[VADDPS reg16:r0 reg16:r7 reg16:r1]"); // MSB in vvvv ignored