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Update documentation for latest changes

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Alexis Engelke
2019-11-03 11:56:38 +01:00
parent 19b76c809e
commit 889a509a5e
2 changed files with 2 additions and 10 deletions
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4
README.md
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@@ -43,7 +43,6 @@ The API consists of two functions to decode and format instructions, as well as
## Intended differences to other decoders ## Intended differences to other decoders
To achieve higher performance, minor differences to other decoders exist, requiring special handling. To achieve higher performance, minor differences to other decoders exist, requiring special handling.
- The registers `ah`/... and `spl`/... have the same number (as in machine code). Distinguishing them is possible using `FD_OP_REG_HIGH`.
- The decoded operand sizes are not always exact. However, the exact size can be reconstructed in all cases. - The decoded operand sizes are not always exact. However, the exact size can be reconstructed in all cases.
- For instructions with rare memory access sizes (e.g. `lgdt`), the provided size is zero. These are: `cmpxchg16b`, `cmpxchg8b`, `fbld` (for 80-bit), `fbstp` (for 80-bit), `fldenv`, `frstor`, `fsave`, `fstenv`, `fstp` (for 80-bit), `fxrstor`, `fxsave`, `lds`, `lds`, `lgdt`, `lidt`, `lldt`, `ltr`, `sgdt`, `sidt`, `sldt`, `str` - For instructions with rare memory access sizes (e.g. `lgdt`), the provided size is zero. These are: `cmpxchg16b`, `cmpxchg8b`, `fbld` (for 80-bit), `fbstp` (for 80-bit), `fldenv`, `frstor`, `fsave`, `fstenv`, `fstp` (for 80-bit), `fxrstor`, `fxsave`, `lds`, `lds`, `lgdt`, `lidt`, `lldt`, `ltr`, `sgdt`, `sidt`, `sldt`, `str`
- For some SSE/AVX instructions, the operand size is an over-approximation of the real size, e.g. for permutations or extensions. - For some SSE/AVX instructions, the operand size is an over-approximation of the real size, e.g. for permutations or extensions.
@@ -52,11 +51,8 @@ To achieve higher performance, minor differences to other decoders exist, requir
- `finit` is decoded as `FD_FWAIT` + `FD_FINIT` - `finit` is decoded as `FD_FWAIT` + `FD_FINIT`
- `fninit` is decoded as plain `FD_FINIT` - `fninit` is decoded as plain `FD_FINIT`
- For `scas` and `cmps`, the `repz` prefix can be queried using `FD_HAS_REP` (matching prefix byte in machine code). - For `scas` and `cmps`, the `repz` prefix can be queried using `FD_HAS_REP` (matching prefix byte in machine code).
- The instructions `bsf`/`tzcnt` and `bsr`/`lzcnt` can only be distinguished by the presence of a `rep` prefix (matching the machine code encoding). Note that on older processors `tzcnt`/`lzcnt` are executed as plain `rep bsf`/`rep bsr`.
- The instructions `movbe`/`crc32` can only be distinguished by the presence of a `repnz` prefix.
## Known issues ## Known issues
- MMX instructions are not supported yet.
- The EVEX prefix (AVX-512) is not supported (yet). - The EVEX prefix (AVX-512) is not supported (yet).
- The layout of entries in the tables can be improved to improve usage of caches. (Help needed.) - The layout of entries in the tables can be improved to improve usage of caches. (Help needed.)
- No Python API. - No Python API.

8
fadec.h
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@@ -150,13 +150,9 @@ void fd_format(const FdInstr* instr, char* buf, size_t len);
#define FD_OPSIZE(instr) ((instr)->operandsz) #define FD_OPSIZE(instr) ((instr)->operandsz)
/** Indicates whether the instruction was encoded with a REP prefix. Needed for: /** Indicates whether the instruction was encoded with a REP prefix. Needed for:
* (1) Handling the instructions MOVS, STOS, LODS, INS and OUTS properly. * (1) Handling the instructions MOVS, STOS, LODS, INS and OUTS properly.
* (2) Handling the instructions SCAS and CMPS, for which this means REPZ. * (2) Handling the instructions SCAS and CMPS, for which this means REPZ. **/
* (3) Distinguishing the instructions BSF (no REP) vs. TZCNT (REP) and the
* instructions BSR (no REP) vs. LZCNT (REP). **/
#define FD_HAS_REP(instr) ((instr)->flags & FD_FLAG_REP) #define FD_HAS_REP(instr) ((instr)->flags & FD_FLAG_REP)
/** Indicates whether the instruction was encoded with a REP prefix. Needed for: /** Indicates whether the instruction was encoded with a REPNZ prefix. **/
* (1) Handling the instructions SCAS and CMPS.
* (2) Distinguishing the instructions MOVBE (no REPNZ) vs. CRC32 (REPNZ). **/
#define FD_HAS_REPNZ(instr) ((instr)->flags & FD_FLAG_REPNZ) #define FD_HAS_REPNZ(instr) ((instr)->flags & FD_FLAG_REPNZ)
/** Indicates whether the instruction was encoded with a LOCK prefix. Note that /** Indicates whether the instruction was encoded with a LOCK prefix. Note that
* it is not checked whether the LOCK prefix is valid for the instruction. **/ * it is not checked whether the LOCK prefix is valid for the instruction. **/