From 862b6d285c41bf6b5bef0135f8a78b01f3146e71 Mon Sep 17 00:00:00 2001 From: Alexis Engelke Date: Sun, 10 Jan 2021 14:13:44 +0100 Subject: [PATCH] instrs: Minor operand size fixes --- format.c | 1 + instrs.txt | 12 +++++++----- parseinstrs.py | 4 +++- tests/test_decode.c | 7 +++++++ 4 files changed, 18 insertions(+), 6 deletions(-) diff --git a/format.c b/format.c index 1d197a6..dde5d16 100644 --- a/format.c +++ b/format.c @@ -334,6 +334,7 @@ fd_format_abs(const FdInstr* instr, uint64_t addr, char* buffer, size_t len) case 10: buf = fd_strplcpy(buf, "tbyte ptr ", end-buf); break; case 16: buf = fd_strplcpy(buf, "xmmword ptr ", end-buf); break; case 32: buf = fd_strplcpy(buf, "ymmword ptr ", end-buf); break; + case 64: buf = fd_strplcpy(buf, "zmmword ptr ", end-buf); break; } unsigned seg = FD_SEGMENT(instr); if (seg != FD_REG_NONE) { diff --git a/instrs.txt b/instrs.txt index c57083e..bdbd5b4 100644 --- a/instrs.txt +++ b/instrs.txt @@ -503,6 +503,7 @@ NP.0f77 NP - - - - MMX_EMMS NP.W0.0f7e MR GP32 MMX - - MMX_MOVD NP.W1.0f7e MR GP64 MMX - - MMX_MOVQ NP.0f7f MR MMX MMX - - MMX_MOVQ +# TODO: GP operand is actually GP16 NP.0fc4 RMI MMX GP IMM8 - MMX_PINSRW ENC_NOSZ NP.0fc5/r RMI GP MMX IMM8 - MMX_PEXTRW DEF64 NP.0fd1 RM MMX MMX - - MMX_PSRLW @@ -816,7 +817,8 @@ F2.0ff0/m RM XMM MEMV - - SSE_LDDQU 66.0f383f RM XMM XMM - - SSE_PMAXUD 66.0f3840 RM XMM XMM - - SSE_PMULLD 66.0f3841 RM XMM XMM - - SSE_PHMINPOSUW -66.0f38f8/m RM GP MEMZ - - MOVDIR64B +# TODO: GP operand has address size +66.0f38f8/m RM GP MEM512 - - MOVDIR64B DEF64 NP.0f38f9/m MR MEM GP - - MOVDIRI # 66.0f3a08 RMI XMM XMM IMM8 - SSE_ROUNDPS @@ -1418,7 +1420,7 @@ F3.0fae/6m M GP - - - CLRSSBSY F3.0fae/5r M GP - - - INCSSP # # CLDEMOTE -NP.0f1c/0m M MEMZ - - - CLDEMOTE +NP.0f1c/0m M MEM8 - - - CLDEMOTE # VMX 66.0f3880/m RM GP MEMZ - - INVEPT DEF64 @@ -1454,8 +1456,8 @@ F3.0fae/4 M GP - - - PTWRITE 66.0f3acf RMI XMM XMM IMM8 - GF2P8AFFINEINVQB # ENQCMD -F2.0f38f8/m RM GP MEMZ - - ENQCMD -F3.0f38f8/m RM GP MEMZ - - ENQCMDS +F2.0f38f8/m RM GP MEM512 - - ENQCMD +F3.0f38f8/m RM GP MEM512 - - ENQCMDS # PCONFIG NP.0f01c5 NP - - - - PCONFIG @@ -1481,7 +1483,7 @@ NP.0fc7/5m M MEMZ - - - XSAVES INSTR_WIDTH NFx.0fc7/6r M GP - - - RDRAND NFx.0fc7/7r M GP - - - RDSEED F3.0fc7/7r M GP - - - RDPID DEF64 -66.0f3882/m RM GP MEMZ - - INVPCID DEF64 +66.0f3882/m RM GP MEM128 - - INVPCID DEF64 NP.0f38c8 RM XMM XMM - - SHA1NEXTE NP.0f38c9 RM XMM XMM - - SHA1MSG1 NP.0f38ca RM XMM XMM - - SHA1MSG2 diff --git a/parseinstrs.py b/parseinstrs.py index 46d4545..df9c4b6 100644 --- a/parseinstrs.py +++ b/parseinstrs.py @@ -122,6 +122,8 @@ OPKINDS = { "MEM32": OpKind(4, OpKind.K_MEM), "MEM64": OpKind(8, OpKind.K_MEM), "MEM128": OpKind(16, OpKind.K_MEM), + "MEM256": OpKind(32, OpKind.K_MEM), + "MEM512": OpKind(64, OpKind.K_MEM), "MASK8": OpKind(1, "MASK"), "MASK16": OpKind(2, "MASK"), "MASK32": OpKind(4, "MASK"), @@ -139,7 +141,7 @@ class InstrDesc(NamedTuple): OPKIND_REGTYS = {"GP": 0, "FPU": 1, "XMM": 2, "MASK": 3, "MMX": 4, "BND": 5} OPKIND_SIZES = { - 0: 0, 1: 1, 2: 2, 4: 3, 8: 4, 16: 5, 32: 6, 10: 0, + 0: 0, 1: 1, 2: 2, 4: 3, 8: 4, 16: 5, 32: 6, 64: 7, 10: 0, OpKind.SZ_OP: -2, OpKind.SZ_VEC: -3, } diff --git a/tests/test_decode.c b/tests/test_decode.c index 8c2a992..f9badea 100644 --- a/tests/test_decode.c +++ b/tests/test_decode.c @@ -293,6 +293,13 @@ main(int argc, char** argv) TEST64("\x0f\x09", "wbinvd"); TEST64("\xf3\x0f\x09", "wbnoinvd"); + TEST32("\x66\x0f\x38\x82\x01", "invpcid eax, xmmword ptr [ecx]"); + TEST64("\x66\x0f\x38\x82\x01", "invpcid rax, xmmword ptr [rcx]"); + TEST32("\x66\x0f\x38\xf8\x01", "movdir64b eax, zmmword ptr [ecx]"); + TEST64("\x66\x0f\x38\xf8\x01", "movdir64b rax, zmmword ptr [rcx]"); + // TODO: MOVDIR64B first operand has address size. + // TEST32("\x67\x66\x0f\x38\xf8\x01", "movdir64b ax, zmmword ptr [cx]"); + // TEST64("\x67\x66\x0f\x38\xf8\x01", "movdir64b eax, zmmword ptr [ecx]"); TEST64("\x0f\xae\xe8", "lfence");