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instrs: Add VNNI-INT8 and VNNI tests

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This commit is contained in:
Alexis Engelke
2022-11-27 13:23:42 +01:00
parent fe6fe0ffc1
commit 7db75f64d0
3 changed files with 48 additions and 0 deletions
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21
decode-test.c
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@@ -598,6 +598,27 @@ main(int argc, char** argv)
TEST("\xc4\xe2\x71\xdf\xc2", "vaesdeclast xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x75\xdf\xc2", "vaesdeclast ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x70\x50\xc2", "vpdpbuud xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x74\x50\xc2", "vpdpbuud ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x71\x50\xc2", "vpdpbusd xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x75\x50\xc2", "vpdpbusd ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x72\x50\xc2", "vpdpbsud xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x76\x50\xc2", "vpdpbsud ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x73\x50\xc2", "vpdpbssd xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x77\x50\xc2", "vpdpbssd ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x70\x51\xc2", "vpdpbuuds xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x74\x51\xc2", "vpdpbuuds ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x71\x51\xc2", "vpdpbusds xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x75\x51\xc2", "vpdpbusds ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x72\x51\xc2", "vpdpbsuds xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x76\x51\xc2", "vpdpbsuds ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x73\x51\xc2", "vpdpbssds xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x77\x51\xc2", "vpdpbssds ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x71\x52\xc2", "vpdpwssd xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x75\x52\xc2", "vpdpwssd ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x71\x53\xc2", "vpdpwssds xmm0, xmm1, xmm2");
TEST("\xc4\xe2\x75\x53\xc2", "vpdpwssds ymm0, ymm1, ymm2");
TEST("\xc4\xe2\x71\x92\xc0", "UD"); // Must have memory operand
TEST("\xc4\xe2\x71\x92\x00", "UD"); // Must have SIB byte
TEST("\xc4\xe2\x71\x92\x05\x00\x00\x00\x00", "UD"); // Must have SIB byte

21
encode-test.inc
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@@ -318,6 +318,27 @@ TEST("\xc4\xe2\x75\xde\xc2", VAESDEC256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x71\xdf\xc2", VAESDECLAST128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x75\xdf\xc2", VAESDECLAST256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x70\x50\xc2", VPDPBUUD128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x74\x50\xc2", VPDPBUUD256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x71\x50\xc2", VPDPBUSD128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x75\x50\xc2", VPDPBUSD256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x72\x50\xc2", VPDPBSUD128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x76\x50\xc2", VPDPBSUD256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x73\x50\xc2", VPDPBSSD128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x77\x50\xc2", VPDPBSSD256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x70\x51\xc2", VPDPBUUDS128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x74\x51\xc2", VPDPBUUDS256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x71\x51\xc2", VPDPBUSDS128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x75\x51\xc2", VPDPBUSDS256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x72\x51\xc2", VPDPBSUDS128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x76\x51\xc2", VPDPBSUDS256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x73\x51\xc2", VPDPBSSDS128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x77\x51\xc2", VPDPBSSDS256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x71\x52\xc2", VPDPWSSD128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x75\x52\xc2", VPDPWSSD256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x71\x53\xc2", VPDPWSSDS128rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
TEST("\xc4\xe2\x75\x53\xc2", VPDPWSSDS256rrr, 0, FE_XMM0, FE_XMM1, FE_XMM2);
// Test ModRM encoding
TEST("\x01\x00", ADD32mr, 0, FE_MEM(FE_AX, 0, FE_NOREG, 0), FE_AX);
TEST("\x01\x04\x24", ADD32mr, 0, FE_MEM(FE_SP, 0, FE_NOREG, 0), FE_AX);

6
instrs.txt
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@@ -1595,8 +1595,14 @@ F2.0f01e8 NP - - - - XSUSLDTRK F=TSXLDTRK
F2.0f01e9 NP - - - - XRESLDTRK F=TSXLDTRK
# AVX_VNNI
VEX.NP.W0.0f3850 RVM Vx Hx Wx - VPDPBUUD F=VNNI-INT8
VEX.66.W0.0f3850 RVM Vx Hx Wx - VPDPBUSD F=VNNI
VEX.F3.W0.0f3850 RVM Vx Hx Wx - VPDPBSUD F=VNNI-INT8
VEX.F2.W0.0f3850 RVM Vx Hx Wx - VPDPBSSD F=VNNI-INT8
VEX.NP.W0.0f3851 RVM Vx Hx Wx - VPDPBUUDS F=VNNI-INT8
VEX.66.W0.0f3851 RVM Vx Hx Wx - VPDPBUSDS F=VNNI
VEX.F3.W0.0f3851 RVM Vx Hx Wx - VPDPBSUDS F=VNNI-INT8
VEX.F2.W0.0f3851 RVM Vx Hx Wx - VPDPBSSDS F=VNNI-INT8
VEX.66.W0.0f3852 RVM Vx Hx Wx - VPDPWSSD F=VNNI
VEX.66.W0.0f3853 RVM Vx Hx Wx - VPDPWSSDS F=VNNI