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instrs: Encode memory size for FPU instructions

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This commit is contained in:
Alexis Engelke
2020-06-19 14:03:04 +02:00
parent bacfecfead
commit 618d90ed42
2 changed files with 60 additions and 56 deletions
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112
instrs.txt
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@@ -1262,14 +1262,14 @@ VEX.F3.L0.0f38f7 RMV GP GP GP - SARX
F3.0f38f6 RM GP GP - - ADOX F3.0f38f6 RM GP GP - - ADOX
# #
# FPU # FPU
d8//0 M FPU - - - FADD_F32 d8//0 M MEM32 - - - FADD
d8//1 M FPU - - - FMUL_F32 d8//1 M MEM32 - - - FMUL
d8//2 M FPU - - - FCOM_F32 d8//2 M MEM32 - - - FCOM
d8//3 M FPU - - - FCOMP_F32 d8//3 M MEM32 - - - FCOMP
d8//4 M FPU - - - FSUB_F32 d8//4 M MEM32 - - - FSUB
d8//5 M FPU - - - FSUBR_F32 d8//5 M MEM32 - - - FSUBR
d8//6 M FPU - - - FDIV_F32 d8//6 M MEM32 - - - FDIV
d8//7 M FPU - - - FDIVR_F32 d8//7 M MEM32 - - - FDIVR
d8//c0+ AO FPU FPU - - FADD d8//c0+ AO FPU FPU - - FADD
d8//c8+ AO FPU FPU - - FMUL d8//c8+ AO FPU FPU - - FMUL
d8//d0+ AO FPU FPU - - FCOM d8//d0+ AO FPU FPU - - FCOM
@@ -1278,13 +1278,13 @@ d8//e0+ AO FPU FPU - - FSUB
d8//e8+ AO FPU FPU - - FSUBR d8//e8+ AO FPU FPU - - FSUBR
d8//f0+ AO FPU FPU - - FDIV d8//f0+ AO FPU FPU - - FDIV
d8//f8+ AO FPU FPU - - FDIVR d8//f8+ AO FPU FPU - - FDIVR
d9//0 M FPU - - - FLD_F32 d9//0 M MEM32 - - - FLD
d9//2 M FPU - - - FST_F32 d9//2 M MEM32 - - - FST
d9//3 M FPU - - - FSTP_F32 d9//3 M MEM32 - - - FSTP
d9//4 M MEMZ - - - FLDENV d9//4 M MEMZ - - - FLDENV
d9//5 M GP16 - - - FLDCW d9//5 M MEM16 - - - FLDCW
d9//6 M MEMZ - - - FSTENV d9//6 M MEMZ - - - FSTENV
d9//7 M GP16 - - - FSTCW d9//7 M MEM16 - - - FSTCW
d9//c8+ O FPU - - - FXCH d9//c8+ O FPU - - - FXCH
d9//d0 NP - - - - FNOP d9//d0 NP - - - - FNOP
d9//e0 NP - - - - FCHS d9//e0 NP - - - - FCHS
@@ -1314,25 +1314,25 @@ d9//fc NP - - - - FRNDINT
d9//fd NP - - - - FSCALE d9//fd NP - - - - FSCALE
d9//fe NP - - - - FSIN d9//fe NP - - - - FSIN
d9//ff NP - - - - FCOS d9//ff NP - - - - FCOS
da//0 M FPU - - - FIADD_I32 da//0 M MEM32 - - - FIADD
da//1 M FPU - - - FIMUL_I32 da//1 M MEM32 - - - FIMUL
da//2 M FPU - - - FICOM_I32 da//2 M MEM32 - - - FICOM
da//3 M FPU - - - FICOMP_I32 da//3 M MEM32 - - - FICOMP
da//4 M FPU - - - FISUB_I32 da//4 M MEM32 - - - FISUB
da//5 M FPU - - - FISUBR_I32 da//5 M MEM32 - - - FISUBR
da//6 M FPU - - - FIDIV_I32 da//6 M MEM32 - - - FIDIV
da//7 M FPU - - - FIDIVR_I32 da//7 M MEM32 - - - FIDIVR
da//c0+ O FPU - - - FCMOVB da//c0+ O FPU - - - FCMOVB
da//c8+ O FPU - - - FCMOVE da//c8+ O FPU - - - FCMOVE
da//d0+ O FPU - - - FCMOVBE da//d0+ O FPU - - - FCMOVBE
da//d8+ O FPU - - - FCMOVU da//d8+ O FPU - - - FCMOVU
da//e9 NP - - - - FUCOMPP da//e9 NP - - - - FUCOMPP
db//0 M FPU - - - FILD_I32 db//0 M MEM32 - - - FILD
db//1 M FPU - - - FISTTP_I32 db//1 M MEM32 - - - FISTTP
db//2 M FPU - - - FIST_I32 db//2 M MEM32 - - - FIST
db//3 M FPU - - - FISTP_I32 db//3 M MEM32 - - - FISTP
db//5 M FPU - - - FLD_F80 db//5 M FPU - - - FLD
db//7 M FPU - - - FSTP_F80 db//7 M FPU - - - FSTP
db//c0+ O FPU - - - FCMOVNB db//c0+ O FPU - - - FCMOVNB
db//c8+ O FPU - - - FCMOVNE db//c8+ O FPU - - - FCMOVNE
db//d0+ O FPU - - - FCMOVNBE db//d0+ O FPU - - - FCMOVNBE
@@ -1341,40 +1341,40 @@ db//e2 NP - - - - FCLEX
db//e3 NP - - - - FINIT db//e3 NP - - - - FINIT
db//e8+ O FPU - - - FUCOMI db//e8+ O FPU - - - FUCOMI
db//f0+ O FPU - - - FCOMI db//f0+ O FPU - - - FCOMI
dc//0 M FPU - - - FADD_F64 dc//0 M MEM64 - - - FADD
dc//1 M FPU - - - FMUL_F64 dc//1 M MEM64 - - - FMUL
dc//2 M FPU - - - FCOM_F64 dc//2 M MEM64 - - - FCOM
dc//3 M FPU - - - FCOMP_F64 dc//3 M MEM64 - - - FCOMP
dc//4 M FPU - - - FSUB_F64 dc//4 M MEM64 - - - FSUB
dc//5 M FPU - - - FSUBR_F64 dc//5 M MEM64 - - - FSUBR
dc//6 M FPU - - - FDIV_F64 dc//6 M MEM64 - - - FDIV
dc//7 M FPU - - - FDIVR_F64 dc//7 M MEM64 - - - FDIVR
dc//c0+ OA FPU FPU - - FADD dc//c0+ OA FPU FPU - - FADD
dc//c8+ OA FPU FPU - - FMUL dc//c8+ OA FPU FPU - - FMUL
dc//e0+ OA FPU FPU - - FSUBR dc//e0+ OA FPU FPU - - FSUBR
dc//e8+ OA FPU FPU - - FSUB dc//e8+ OA FPU FPU - - FSUB
dc//f0+ OA FPU FPU - - FDIVR dc//f0+ OA FPU FPU - - FDIVR
dc//f8+ OA FPU FPU - - FDIV dc//f8+ OA FPU FPU - - FDIV
dd//0 M FPU - - - FLD_F64 dd//0 M MEM64 - - - FLD
dd//1 M FPU - - - FISTTP_I64 dd//1 M MEM64 - - - FISTTP
dd//2 M FPU - - - FST_F64 dd//2 M MEM64 - - - FST
dd//3 M FPU - - - FSTP_F64 dd//3 M MEM64 - - - FSTP
dd//4 M MEMZ - - - FRSTOR dd//4 M MEMZ - - - FRSTOR
dd//6 M MEMZ - - - FSAVE dd//6 M MEMZ - - - FSAVE
dd//7 M GP16 - - - FSTSW dd//7 M MEM16 - - - FSTSW
dd//c0+ O FPU - - - FFREE dd//c0+ O FPU - - - FFREE
dd//d0+ O FPU - - - FST dd//d0+ O FPU - - - FST
dd//d8+ O FPU - - - FSTP dd//d8+ O FPU - - - FSTP
dd//e0+ O FPU - - - FUCOM dd//e0+ O FPU - - - FUCOM
dd//e8+ O FPU - - - FUCOMP dd//e8+ O FPU - - - FUCOMP
de//0 M FPU - - - FIADD_I16 de//0 M MEM16 - - - FIADD
de//1 M FPU - - - FIMUL_I16 de//1 M MEM16 - - - FIMUL
de//2 M FPU - - - FICOM_I16 de//2 M MEM16 - - - FICOM
de//3 M FPU - - - FICOMP_I16 de//3 M MEM16 - - - FICOMP
de//4 M FPU - - - FISUB_I16 de//4 M MEM16 - - - FISUB
de//5 M FPU - - - FISUBR_I16 de//5 M MEM16 - - - FISUBR
de//6 M FPU - - - FIDIV_I16 de//6 M MEM16 - - - FIDIV
de//7 M FPU - - - FIDIVR_I16 de//7 M MEM16 - - - FIDIVR
de//c0+ OA FPU FPU - - FADDP de//c0+ OA FPU FPU - - FADDP
de//c8+ OA FPU FPU - - FMULP de//c8+ OA FPU FPU - - FMULP
de//d9 NP - - - - FCOMPP de//d9 NP - - - - FCOMPP
@@ -1382,14 +1382,14 @@ de//e0+ OA FPU FPU - - FSUBRP
de//e8+ OA FPU FPU - - FSUBP de//e8+ OA FPU FPU - - FSUBP
de//f0+ OA FPU FPU - - FDIVRP de//f0+ OA FPU FPU - - FDIVRP
de//f8+ OA FPU FPU - - FDIVP de//f8+ OA FPU FPU - - FDIVP
df//0 M FPU - - - FILD_I16 df//0 M MEM16 - - - FILD
df//1 M FPU - - - FISTTP_I16 df//1 M MEM16 - - - FISTTP
df//2 M FPU - - - FIST_I16 df//2 M MEM16 - - - FIST
df//3 M FPU - - - FISTP_I16 df//3 M MEM16 - - - FISTP
df//4 M MEMZ - - - FBLD df//4 M FPU - - - FBLD
df//5 M GP - - - FILD_I64 df//5 M MEM64 - - - FILD
df//6 M MEMZ - - - FBSTP df//6 M FPU - - - FBSTP
df//7 M GP - - - FISTP_I64 df//7 M MEM64 - - - FISTP
# FSTSW AX # FSTSW AX
df//e0 O GP16 - - - FSTSW df//e0 O GP16 - - - FSTSW
df//f0+ AO FPU FPU - - FCOMIP df//f0+ AO FPU FPU - - FCOMIP

4
parseinstrs.py
View File

@@ -105,6 +105,10 @@ OPKIND_LOOKUP = {
"SREG": (0, 0, 3), "SREG": (0, 0, 3),
"FPU": (0, 0, 4), "FPU": (0, 0, 4),
"MEMZ": (0, 0, 0), "MEMZ": (0, 0, 0),
"MEM8": (1, 0, 0),
"MEM16": (1, 1, 0),
"MEM32": (1, 2, 0),
"MEM64": (1, 3, 0),
"BND": (0, 0, 8), "BND": (0, 0, 8),
"CR": (0, 0, 9), "CR": (0, 0, 9),
"DR": (0, 0, 10), "DR": (0, 0, 10),