From 538708cd21b2243fb99283fb1f29bbf614134418 Mon Sep 17 00:00:00 2001
From: Alexis Engelke <alexis.engelke@googlemail.com>
Date: Fri, 24 Mar 2023 13:59:38 +0100
Subject: [PATCH] decode: Change encoding of T16 index

This encoding change saves a shift for the "is register" part.
---
 decode.c       | 8 ++++----
 parseinstrs.py | 6 +++---
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/decode.c b/decode.c
index 74244da..eabe11e 100644
--- a/decode.c
+++ b/decode.c
@@ -179,8 +179,8 @@ fd_decode(const uint8_t* buffer, size_t len_sz, int mode_int, uintptr_t address,
         if (table_entry & 1) {
             if (UNLIKELY(off >= len))
                 return FD_ERR_PARTIAL;
-            unsigned isreg = buffer[off] >= 0xc0 ? 8 : 0;
-            table_entry = table_walk(table_entry, ((buffer[off] >> 3) & 7) | isreg);
+            unsigned isreg = buffer[off] >= 0xc0;
+            table_entry = table_walk(table_entry, ((buffer[off] >> 2) & 0xe) | isreg);
             // table_entry kinds: INSTR(0), T8E(1)
             if (table_entry & 1)
                 table_entry = table_walk(table_entry, buffer[off] & 7);
@@ -314,8 +314,8 @@ fd_decode(const uint8_t* buffer, size_t len_sz, int mode_int, uintptr_t address,
     if (table_entry & 1) {
         if (UNLIKELY(off >= len))
             return FD_ERR_PARTIAL;
-        unsigned isreg = buffer[off] >= 0xc0 ? 8 : 0;
-        table_entry = table_walk(table_entry, ((buffer[off] >> 3) & 7) | isreg);
+        unsigned isreg = buffer[off] >= 0xc0;
+        table_entry = table_walk(table_entry, ((buffer[off] >> 2) & 0xe) | isreg);
         // table_entry kinds: INSTR(0), T8E(1), TVEX(2)
         if (table_entry & 1)
             table_entry = table_walk(table_entry, buffer[off] & 7);
diff --git a/parseinstrs.py b/parseinstrs.py
index fb02815..4098b31 100644
--- a/parseinstrs.py
+++ b/parseinstrs.py
@@ -521,14 +521,14 @@ class Trie:
         elif opc.prefix:
             tprefix = [["NP", "66", "F3", "F2"].index(opc.prefix)]
         if opc.opcext:
-            t16 = [((opc.opcext - 0xc0) >> 3) | 8]
+            t16 = [((opc.opcext - 0xc0) >> 2) | 1]
             if not opc.extended:
                 t8e = [opc.opcext & 7]
         elif opc.modreg:
             # TODO: optimize for /r and /m specifiers to reduce size
-            mod = {"m": [0], "r": [1<<3], "rm": [0, 1<<3]}[opc.modreg[1]]
+            mod = {"m": [0], "r": [1], "rm": [0, 1]}[opc.modreg[1]]
             reg = [opc.modreg[0]] if opc.modreg[0] is not None else list(range(8))
-            t16 = [x + y for x in mod for y in reg]
+            t16 = [x + (y << 1) for x in mod for y in reg]
         if opc.rexw is not None or (opc.vexl or "IG") != "IG":
             rexw = {"0": [0], "1": [1<<0], None: [0, 1<<0]}[opc.rexw]
             if opc.vex < 2: