T0b1/fadec
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

instrs: Several operand size and AVX-related fixes

Browse Source
This commit is contained in:
Alexis Engelke
2020-07-05 14:53:54 +02:00
parent 9d7aeb2b61
commit 4e95c8d152
2 changed files with 74 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files

71
instrs.txt
View File

@@ -302,8 +302,8 @@ ff/6 M GP - - - PUSH DEF64
0f00/1 M GP16 - - - STR
0f00/2 M GP16 - - - LLDT
0f00/3 M GP16 - - - LTR
0f00/4 M GP - - - VERR
0f00/5 M GP - - - VERW
0f00/4 M GP16 - - - VERR
0f00/5 M GP16 - - - VERW
0f01//0 M MEMZ - - - SGDT
0f01//1 M MEMZ - - - SIDT
0f01//2 M MEMZ - - - LGDT
@@ -490,8 +490,8 @@ NP.0f68 RM MMX MMX - - MMX_PUNPCKHBW
NP.0f69 RM MMX MMX - - MMX_PUNPCKHWD
NP.0f6a RM MMX MMX - - MMX_PUNPCKHDQ
NP.0f6b RM MMX MMX - - MMX_PACKSSDW
NP.W0.0f6e RM MMX GP - - MMX_MOVD
NP.W1.0f6e RM MMX GP - - MMX_MOVQ
NP.W0.0f6e RM MMX GP32 - - MMX_MOVD
NP.W1.0f6e RM MMX GP64 - - MMX_MOVQ
NP.0f6f RM MMX MMX - - MMX_MOVQ
NP.0f71/2 MI MMX IMM8 - - MMX_PSRLW NOMEM
NP.0f71/4 MI MMX IMM8 - - MMX_PSRAW NOMEM
@@ -505,11 +505,11 @@ NP.0f74 RM MMX MMX - - MMX_PCMPEQB
NP.0f75 RM MMX MMX - - MMX_PCMPEQW
NP.0f76 RM MMX MMX - - MMX_PCMPEQD
NP.0f77 NP - - - - MMX_EMMS
NP.W0.0f7e MR GP MMX - - MMX_MOVD
NP.W1.0f7e MR GP MMX - - MMX_MOVQ
NP.W0.0f7e MR GP32 MMX - - MMX_MOVD
NP.W1.0f7e MR GP64 MMX - - MMX_MOVQ
NP.0f7f MR MMX MMX - - MMX_MOVQ
NP.0fc4 RMI MMX GP IMM8 - MMX_PINSRW
NP.0fc5 RMI GP MMX IMM8 - MMX_PEXTRW NOMEM
NP.0fc5 RMI GP MMX IMM8 - MMX_PEXTRW DEF64 NOMEM
NP.0fd1 RM MMX MMX - - MMX_PSRLW
NP.0fd2 RM MMX MMX - - MMX_PSRLD
NP.0fd3 RM MMX MMX - - MMX_PSRLQ
@@ -677,8 +677,8 @@ F2.0f5f RM XMM64 XMM64 - - SSE_MAXSD
66.0f6b RM XMM XMM - - SSE_PACKSSDW
66.0f6c RM XMM XMM - - SSE_PUNPCKLQDQ
66.0f6d RM XMM XMM - - SSE_PUNPCKHQDQ
66.W0.0f6e RM XMM GP - - SSE_MOVD
66.W1.0f6e RM XMM GP - - SSE_MOVQ
66.W0.0f6e RM XMM GP32 - - SSE_MOVD
66.W1.0f6e RM XMM GP64 - - SSE_MOVQ
66.0f6f RM XMM XMM - - SSE_MOVDQA
F3.0f6f RM XMM XMM - - SSE_MOVDQU
66.0f70 RMI XMM XMM IMM8 - SSE_PSHUFD
@@ -701,8 +701,8 @@ F2.0f70 RMI XMM XMM IMM8 - SSE_PSHUFLW
F2.0f7c RM XMM XMM - - SSE_HADDPS
66.0f7d RM XMM XMM - - SSE_HSUBPD
F2.0f7d RM XMM XMM - - SSE_HSUBPS
66.W0.0f7e MR GP XMM32 - - SSE_MOVD
66.W1.0f7e MR GP XMM64 - - SSE_MOVQ
66.W0.0f7e MR GP32 XMM32 - - SSE_MOVD
66.W1.0f7e MR GP64 XMM64 - - SSE_MOVQ
F3.0f7e RM XMM XMM64 - - SSE_MOVQ
66.0f7f MR XMM XMM - - SSE_MOVDQA
F3.0f7f MR XMM XMM - - SSE_MOVDQU
@@ -717,8 +717,8 @@ NP.0fc2 RMI XMM XMM IMM8 - SSE_CMPPS
66.0fc2 RMI XMM XMM IMM8 - SSE_CMPPD
F3.0fc2 RMI XMM XMM32 IMM8 - SSE_CMPSS
F2.0fc2 RMI XMM XMM64 IMM8 - SSE_CMPSD
66.0fc4 RMI XMM GP IMM8 - SSE_PINSRW
66.0fc5 RMI GP XMM IMM8 - SSE_PEXTRW NOMEM
66.0fc4 RMI XMM GP16 IMM8 - SSE_PINSRW
66.0fc5 RMI GP XMM IMM8 - SSE_PEXTRW DEF64 NOMEM
NP.0fc6 RMI XMM XMM IMM8 - SSE_SHUFPS
66.0fc6 RMI XMM XMM IMM8 - SSE_SHUFPD
66.0fd0 RM XMM XMM - - SSE_ADDSUBPD
@@ -832,13 +832,13 @@ NP.0f38f9 MR MEM GP - - MOVDIRI
66.0f3a0f RMI XMM XMM IMM8 - SSE_PALIGNR
66.0f3a14 MRI GP8 XMM IMM8 - SSE_PEXTRB
66.0f3a15 MRI GP16 XMM IMM8 - SSE_PEXTRW
66.W0.0f3a16 MRI GP XMM IMM8 - SSE_PEXTRD
66.W1.0f3a16 MRI GP XMM IMM8 - SSE_PEXTRQ
66.W0.0f3a16 MRI GP32 XMM IMM8 - SSE_PEXTRD
66.W1.0f3a16 MRI GP64 XMM IMM8 - SSE_PEXTRQ
66.0f3a17 MRI GP32 XMM IMM8 - SSE_EXTRACTPS
66.0f3a20 RMI XMM GP8 IMM8 - SSE_PINSRB
66.0f3a21 RMI XMM XMM32 IMM8 - SSE_INSERTPS
66.W0.0f3a22 RMI XMM GP IMM8 - SSE_PINSRD
66.W1.0f3a22 RMI XMM GP IMM8 - SSE_PINSRQ
66.W0.0f3a22 RMI XMM GP32 IMM8 - SSE_PINSRD
66.W1.0f3a22 RMI XMM GP64 IMM8 - SSE_PINSRQ
66.0f3a40 RMI XMM XMM IMM8 - SSE_DPPS
66.0f3a41 RMI XMM XMM IMM8 - SSE_DPPD
66.0f3a42 RMI XMM XMM IMM8 - SSE_MPSADBW
@@ -1007,8 +1007,8 @@ VEX.NP.0fc2 RVMI XMM XMM XMM IMM8 VCMPPS
VEX.66.0fc2 RVMI XMM XMM XMM IMM8 VCMPPD
VEX.F3.LIG.0fc2 RVMI XMM XMM XMM32 IMM8 VCMPSS
VEX.F2.LIG.0fc2 RVMI XMM XMM XMM64 IMM8 VCMPSD
VEX.66.W0.0fc4 RVMI XMM XMM GP IMM8 VPINSRW
VEX.66.W0.L0.0fc5 RMI GP XMM IMM8 - VPEXTRW
VEX.66.WIG.L0.0fc4 RVMI XMM XMM GP16 IMM8 VPINSRW
VEX.66.WIG.L0.0fc5 RMI GP XMM IMM8 - VPEXTRW DEF64 NOMEM
VEX.NP.0fc6 RVMI XMM XMM XMM IMM8 VSHUFPS
VEX.66.0fc6 RVMI XMM XMM XMM IMM8 VSHUFPD
VEX.NP.0fd0 RVM XMM XMM XMM - VADDSUBPS
@@ -1129,7 +1129,7 @@ VEX.66.W0.0f3847 RVM XMM XMM XMM - VPSLLVD
VEX.66.W1.0f3847 RVM XMM XMM XMM - VPSLLVQ
VEX.66.W0.0f3858 RM XMM XMM32 - - VPBROADCASTD
VEX.66.W0.0f3859 RM XMM XMM64 - - VPBROADCASTQ
VEX.66.W0.L1.0f385a RM XMM MEM128 - - VPBROADCASTI128
VEX.66.W0.L1.0f385a RM XMM MEM128 - - VBROADCASTI128
VEX.66.W0.0f3878 RM XMM XMM8 - - VPBROADCASTB
VEX.66.W0.0f3879 RM XMM XMM16 - - VPBROADCASTW
VEX.66.W0.0f388c RVM XMM XMM XMM - VPMASKMOVD
@@ -1218,29 +1218,32 @@ VEX.66.0f3a0c RVMI XMM XMM XMM IMM8 VBLENDPS
VEX.66.0f3a0d RVMI XMM XMM XMM IMM8 VBLENDPD
VEX.66.0f3a0e RVMI XMM XMM XMM IMM8 VPBLENDW
VEX.66.0f3a0f RVMI XMM XMM XMM IMM8 VPALIGNR
VEX.66.W0.L0.0f3a14 MRI GP8 XMM IMM8 - VPEXTRB
VEX.66.W0.L0.0f3a15 MRI GP16 XMM IMM8 - VPEXTRW
VEX.66.WIG.L0.0f3a14 MRI GP8 XMM IMM8 - VPEXTRB
# TODO: also WIG for PEXTRW?
VEX.66.WIG.L0.0f3a15 MRI GP16 XMM IMM8 - VPEXTRW
VEX.66.W0.L0.0f3a16 MRI GP XMM IMM8 - VPEXTRD
VEX.66.W1.L0.0f3a16 MRI GP XMM IMM8 - VPEXTRQ
VEX.66.W1.L0.0f3a16 MRI GP XMM IMM8 - VPEXTRD ONLY32
VEX.66.W1.L0.0f3a16 MRI GP XMM IMM8 - VPEXTRQ ONLY64
VEX.66.L0.0f3a17 MRI GP32 XMM IMM8 - VEXTRACTPS
VEX.66.W0.L1.0f3a18 RVMI XMM XMM XMM IMM8 VINSERTF128
VEX.66.W0.L1.0f3a19 MRI XMM XMM IMM8 - VEXTRACTF128
VEX.66.W0.L1.0f3a18 RVMI XMM XMM XMM128 IMM8 VINSERTF128
VEX.66.W0.L1.0f3a19 MRI XMM128 XMM IMM8 - VEXTRACTF128
VEX.66.W0.L1.0f3a1d MRI XMM XMM IMM8 - VCVTPS2PH
VEX.66.W0.L0.0f3a20 RMI XMM GP8 IMM8 - VPINSRB
VEX.66.WIG.L0.0f3a20 RVMI XMM XMM GP8 IMM8 VPINSRB
VEX.66.L0.0f3a21 RVMI XMM XMM XMM32 IMM8 VINSERTPS
VEX.66.W0.L0.0f3a22 RMI XMM GP IMM8 - VPINSRD
VEX.66.W1.L0.0f3a22 RMI XMM GP IMM8 - VPINSRQ
VEX.66.W0.L1.0f3a38 RVMI XMM XMM XMM IMM8 VINSERTI128
VEX.66.W0.L1.0f3a39 MRI XMM XMM IMM8 - VEXTRACTI128
VEX.66.W0.L0.0f3a22 RVMI XMM XMM GP IMM8 VPINSRD
VEX.66.W1.L0.0f3a22 RVMI XMM XMM GP IMM8 VPINSRD ONLY32
VEX.66.W1.L0.0f3a22 RVMI XMM XMM GP IMM8 VPINSRQ ONLY64
VEX.66.W0.L1.0f3a38 RVMI XMM XMM XMM128 IMM8 VINSERTI128
VEX.66.W0.L1.0f3a39 MRI XMM128 XMM IMM8 - VEXTRACTI128
VEX.66.0f3a40 RVMI XMM XMM XMM IMM8 VDPPS
VEX.66.0f3a41 RVMI XMM XMM XMM IMM8 VDPPD
VEX.66.0f3a42 RVMI XMM XMM XMM IMM8 VMPSADBW
VEX.66.0f3a44 RVMI XMM XMM XMM IMM8 VPCLMULQDQ
VEX.66.W0.L1.0f3a46 RVMI XMM XMM XMM IMM8 VPERM2I128
VEX.66.0f3a60 RMI XMM XMM IMM8 - VPCMPESTRM
VEX.66.0f3a61 RMI XMM XMM IMM8 - VPCMPESTRI
VEX.66.0f3a62 RMI XMM XMM IMM8 - VPCMPISTRM
VEX.66.0f3a63 RMI XMM XMM IMM8 - VPCMPISTRI
VEX.66.L0.0f3a60 RMI XMM XMM IMM8 - VPCMPESTRM
VEX.66.L0.0f3a61 RMI XMM XMM IMM8 - VPCMPESTRI
VEX.66.L0.0f3a62 RMI XMM XMM IMM8 - VPCMPISTRM
VEX.66.L0.0f3a63 RMI XMM XMM IMM8 - VPCMPISTRI
#
# BMI1
VEX.NP.L0.0f38f2 RVM GP GP GP - ANDN

37
tests/test_decode.c
View File

@@ -212,6 +212,8 @@ main(int argc, char** argv)
TEST("\x66\x0f\xc6\xc0\x01", "[SSE_SHUFPD reg16:r0 reg16:r0 imm1:0x1]");
TEST("\xf3\x0f\x7e\x5c\x24\x08", "[SSE_MOVQ reg16:r3 mem8:r4+0x8]");
TEST32("\xc4\xe1\x00\x58\xc1", "[VADDPS reg16:r0 reg16:r7 reg16:r1]"); // MSB in vvvv ignored
TEST64("\xc4\xe1\x00\x58\xc1", "[VADDPS reg16:r0 reg16:r15 reg16:r1]");
TEST("\xc5\xf9\x6e\xc8", "[VMOVD reg4:r1 reg4:r0]");
TEST64("\xc4\xe1\xf9\x6e\xc8", "[VMOVQ reg8:r1 reg8:r0]");
TEST32("\xc4\xe1\xf9\x6e\xc8", "[VMOVD reg4:r1 reg4:r0]");
@@ -220,6 +222,41 @@ main(int argc, char** argv)
TEST64("\xc4\xe1\xf2\x2a\xc0", "[VCVTSI2SS reg16:r0 reg16:r1 reg8:r0]");
TEST64("\xc4\xe2\x75\x90\x04\xe7", "[VPGATHERDD reg32:r0 mem32:r7+8*r4 reg32:r1]");
TEST("\xc4\xe3\x79\x14\xc0\x00", "[VPEXTRB reg1:r0 reg16:r0 imm1:0x0]");
TEST("\xc4\xe3\xf9\x14\xc0\x00", "[VPEXTRB reg1:r0 reg16:r0 imm1:0x0]");
TEST("\xc4\xe3\x79\x15\xc0\x00", "[VPEXTRW reg2:r0 reg16:r0 imm1:0x0]");
TEST("\xc4\xe3\xf9\x15\xc0\x00", "[VPEXTRW reg2:r0 reg16:r0 imm1:0x0]");
TEST32("\xc4\xe1\x79\xc5\xc0\x00", "[VPEXTRW reg4:r0 reg16:r0 imm1:0x0]");
TEST64("\xc4\xe1\x79\xc5\xc0\x00", "[VPEXTRW reg8:r0 reg16:r0 imm1:0x0]");
TEST("\xc4\xe3\x79\x16\xc0\x00", "[VPEXTRD reg4:r0 reg16:r0 imm1:0x0]");
TEST32("\xc4\xe3\xf9\x16\xc0\x00", "[VPEXTRD reg4:r0 reg16:r0 imm1:0x0]");
TEST64("\xc4\xe3\xf9\x16\xc0\x00", "[VPEXTRQ reg8:r0 reg16:r0 imm1:0x0]");
TEST("\xc4\xe3\x71\x20\xc0\x00", "[VPINSRB reg16:r0 reg16:r1 reg1:r0 imm1:0x0]");
TEST("\xc4\xe3\xf1\x20\xc0\x00", "[VPINSRB reg16:r0 reg16:r1 reg1:r0 imm1:0x0]");
TEST("\xc4\xe1\x71\xc4\xc0\x00", "[VPINSRW reg16:r0 reg16:r1 reg2:r0 imm1:0x0]");
TEST("\xc4\xe1\xf1\xc4\xc0\x00", "[VPINSRW reg16:r0 reg16:r1 reg2:r0 imm1:0x0]");
TEST("\xc4\xe3\x71\x22\xc0\x00", "[VPINSRD reg16:r0 reg16:r1 reg4:r0 imm1:0x0]");
TEST32("\xc4\xe3\xf1\x22\xc0\x00", "[VPINSRD reg16:r0 reg16:r1 reg4:r0 imm1:0x0]");
TEST64("\xc4\xe3\xf1\x22\xc0\x00", "[VPINSRQ reg16:r0 reg16:r1 reg8:r0 imm1:0x0]");
TEST("\xc4\xe3\x75\x20\xc0\x00", "UD"); // VEX.L != 0
TEST("\xc4\xe1\x75\xc4\xc0\x00", "UD"); // VEX.L != 0
TEST("\xc4\xe1\xf5\xc4\xc0\x00", "UD"); // VEX.L != 0
TEST("\xc4\xe3\x75\x22\xc0\x00", "UD"); // VEX.L != 0
TEST("\xc4\xe3\xf5\x22\xc0\x00", "UD"); // VEX.L != 0
TEST("\xc4\xe2\x71\x45\xc2", "[VPSRLVD reg16:r0 reg16:r1 reg16:r2]");
TEST("\xc4\xe2\x75\x45\xc2", "[VPSRLVD reg32:r0 reg32:r1 reg32:r2]");
TEST("\xc4\xe2\xf1\x45\xc2", "[VPSRLVQ reg16:r0 reg16:r1 reg16:r2]");
TEST("\xc4\xe2\xf5\x45\xc2", "[VPSRLVQ reg32:r0 reg32:r1 reg32:r2]");
TEST("\xc4\xe2\x7d\x5a\x20", "[VBROADCASTI128 reg32:r4 mem16:r0]");
TEST64("\xc4\x62\x7d\x5a\x20", "[VBROADCASTI128 reg32:r12 mem16:r0]");
TEST("\xc4\xe2\x75\x5a\x20", "UD"); // VEX.vvvv != 1111
TEST("\xc4\xe2\x7d\x5a\xc0", "UD"); // ModRM.mod != 11
TEST("\xc4\xe2\x79\x5a\x20", "UD"); // VEX.L != 1
TEST("\xc4\xe2\xfd\x5a\x20", "UD"); // VEX.W != 0
puts(failed ? "Some tests FAILED" : "All tests PASSED");
return failed ? EXIT_FAILURE : EXIT_SUCCESS;
}