commit 0bb8f5c3bef12374da423b4f0130eebfd78b248d Author: T0b1 Date: Tue Apr 18 12:21:54 2023 +0200 init diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..ea8c4bf --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +/target diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 0000000..fe31b2e --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,7 @@ +{ + "editor.formatOnSave": true, + "[rust]": { + "editor.defaultFormatter": "rust-lang.rust-analyzer" + }, + "rust-analyzer.cargo.allFeatures": true +} \ No newline at end of file diff --git a/1 b/1 new file mode 100644 index 0000000..bbaf733 --- /dev/null +++ b/1 @@ -0,0 +1,1579 @@ +warning: unused imports: `Inst`, `Operand` + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:9:54 + | +9 | cfg::CFGInfo, Allocation, Block, Edit, Function, Inst, MachineEnv, Operand, OperandConstraint, + | ^^^^ ^^^^^^^ + | + = note: `#[warn(unused_imports)]` on by default + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:513:33 + | +512 | ... panic!("reftype has fixed use when its required to be on stack"); + | ---------------------------------------------------------------- any code following this expression is unreachable +513 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + | + = note: `#[warn(unreachable_code)]` on by default + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:521:37 + | +520 | ... panic!("fixed reg late use would overwrite another fixed reg use/early write"); + | ------------------------------------------------------------------------------ any code following this expression is unreachable +521 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:530:37 + | +529 | ... panic!("fixed late use would be clobbered"); + | ------------------------------------------- any code following this expression is unreachable +530 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:544:37 + | +543 | ... panic!("fixed late def would overwrite late use/early def"); + | ----------------------------------------------------------- any code following this expression is unreachable +544 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:552:37 + | +551 | ... panic!("early def shares reg or is clobbered"); + | ---------------------------------------------- any code following this expression is unreachable +552 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:677:33 + | +676 | ... panic!("reftype required to be in reg at safepoint"); + | ---------------------------------------------------- any code following this expression is unreachable +677 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:702:21 + | +701 | panic!("Out of registers: {:?}", regs_allocated); + | ------------------------------------------------ any code following this expression is unreachable +702 | return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:754:21 + | +753 | panic!("out of registers"); + | -------------------------- any code following this expression is unreachable +754 | return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unused variable: `func` + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:42:30 + | +42 | pub fn init(func: &F, mach_env: &MachineEnv, cfg: &CFGInfo) -> Self { + | ^^^^ help: if this is intentional, prefix it with an underscore: `_func` + | + = note: `#[warn(unused_variables)]` on by default + +warning: `regalloc2` (lib) generated 10 warnings +warning: unused imports: `BlockCall`, `FuncRef`, `InstructionData`, `Opcode`, `ValueList`, `function` + --> src/main.rs:1:30 + | +1 | use cranelift::codegen::ir::{function, BlockCall, FuncRef, InstructionData, Opcode, ValueList}; + | ^^^^^^^^ ^^^^^^^^^ ^^^^^^^ ^^^^^^^^^^^^^^^ ^^^^^^ ^^^^^^^^^ + | + = note: `#[warn(unused_imports)]` on by default + +warning: unused import: `cranelift::codegen::isa` + --> src/main.rs:2:5 + | +2 | use cranelift::codegen::isa; + | ^^^^^^^^^^^^^^^^^^^^^^^ + +warning: unused import: `cranelift_frontend::FunctionBuilderContext` + --> src/main.rs:5:5 + | +5 | use cranelift_frontend::FunctionBuilderContext; + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +warning: unused imports: `DataDescription`, `FuncId` + --> src/main.rs:7:24 + | +7 | use cranelift_module::{DataDescription, FuncId, Linkage, Module}; + | ^^^^^^^^^^^^^^^ ^^^^^^ + +warning: unused import: `cranelift::prelude` + --> src/main.rs:4:5 + | +4 | use cranelift::prelude::*; + | ^^^^^^^^^^^^^^^^^^ + +warning: `cranelift_test` (bin "cranelift_test") generated 5 warnings + Finished dev [unoptimized + debuginfo] target(s) in 0.03s + Running `target/debug/cranelift_test tests/bad_br.clif` + DEBUG cranelift_codegen::timing > timing: Starting Parsing textual Cranelift IR, (during ) + DEBUG cranelift_codegen::timing > timing: Starting Parsing textual Cranelift IR, (during Parsing textual Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Parsing textual Cranelift IR + DEBUG cranelift_codegen::timing > timing: Ending Parsing textual Cranelift IR + INFO cranelift_jit::backend > defining function funcid0: function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + v4 = iconst.i32 4 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + DEBUG cranelift_codegen::timing > timing: Starting Compilation passes, (during ) + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::context > Number of CLIF instructions to optimize: 6 + DEBUG cranelift_codegen::context > Number of CLIF blocks to optimize: 2 + TRACE cranelift_codegen::context > Optimizing (opt level Speed): +function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + v4 = iconst.i32 4 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + TRACE cranelift_codegen::legalizer > Pre-legalization function: +function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + v4 = iconst.i32 4 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + TRACE cranelift_codegen::legalizer > Post-legalization function: +function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + v4 = iconst.i32 4 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Starting Remove unreachable blocks, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Ending Remove unreachable blocks + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::timing > timing: Starting Dead code elimination, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Ending Dead code elimination + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::timing > timing: Starting Remove constant phi-nodes, (during Compilation passes) + DEBUG cranelift_codegen::remove_constant_phis > do_remove_constant_phis: done, 2 iters. 1 formals, of which 0 const. + DEBUG cranelift_codegen::timing > timing: Ending Remove constant phi-nodes + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::timing > timing: Starting Egraph based optimizations, (during Compilation passes) + TRACE cranelift_codegen::context > About to optimize with egraph phase: +function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + v4 = iconst.i32 4 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + DEBUG cranelift_codegen::timing > timing: Starting Loop analysis, (during Egraph based optimizations) + DEBUG cranelift_codegen::timing > timing: Ending Loop analysis + TRACE cranelift_codegen::alias_analysis > alias analysis: input is: +function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + v4 = iconst.i32 4 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + TRACE cranelift_codegen::alias_analysis > alias analysis: input to block0 is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst0: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst1: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst2: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst3: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst4: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > alias analysis: input to block1 is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst5: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::egraph > Processing block block0 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for blockparam v0 + TRACE cranelift_codegen::egraph > Processing inst inst0 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v1 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v1 + TRACE cranelift_codegen::opts > iter: value v1 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v1 + TRACE cranelift_codegen::egraph > Returned from ISLE for v1, got v1 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst1 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v2 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v2 + TRACE cranelift_codegen::opts > iter: value v2 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v2 + TRACE cranelift_codegen::egraph > Returned from ISLE for v2, got v2 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst2 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v3 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v3 + TRACE cranelift_codegen::opts > iter: value v3 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v3 + TRACE cranelift_codegen::egraph > Returned from ISLE for v3, got v3 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst3 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v4 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v4 + TRACE cranelift_codegen::opts > iter: value v4 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v4 + TRACE cranelift_codegen::egraph > Returned from ISLE for v4, got v4 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst4 + TRACE cranelift_codegen::egraph > rewriting arg v0 of inst inst4 to v0 + TRACE cranelift_codegen::egraph > rewriting arg v4 of inst inst4 to v4 + TRACE cranelift_codegen::egraph > rewriting arg v1 of inst inst4 to v1 + TRACE cranelift_codegen::egraph > rewriting arg v2 of inst inst4 to v2 + TRACE cranelift_codegen::egraph > rewriting arg v2 of inst inst4 to v2 + TRACE cranelift_codegen::egraph > rewriting arg v3 of inst inst4 to v3 + TRACE cranelift_codegen::alias_analysis > alias analysis: scanning at inst4 with state LastStores { heap: None, table: None, vmctx: None, other: None } (BranchTable { opcode: BrTable, arg: v0, table: jt0 }) + TRACE cranelift_codegen::egraph > Processing block block1 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for blockparam v5 + TRACE cranelift_codegen::egraph > Processing inst inst5 + TRACE cranelift_codegen::egraph > rewriting arg v5 of inst inst5 to v5 + TRACE cranelift_codegen::alias_analysis > alias analysis: scanning at inst5 with state LastStores { heap: None, table: None, vmctx: None, other: None } (MultiAry { opcode: Return, args: EntityList { index: 45, unused: PhantomData } }) + TRACE cranelift_codegen::egraph > egraph built: +function u0:2(i32) -> i32 system_v { +block0(v0: i32): + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + + TRACE cranelift_codegen::egraph > -> v0 = Param(block0, 0) + TRACE cranelift_codegen::egraph > -> v1 = Result(inst0, 0) + TRACE cranelift_codegen::egraph > -> inst0 = UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::egraph > -> v2 = Result(inst1, 0) + TRACE cranelift_codegen::egraph > -> inst1 = UnaryImm { opcode: Iconst, imm: Imm64(2) } + TRACE cranelift_codegen::egraph > -> v3 = Result(inst2, 0) + TRACE cranelift_codegen::egraph > -> inst2 = UnaryImm { opcode: Iconst, imm: Imm64(3) } + TRACE cranelift_codegen::egraph > -> v4 = Result(inst3, 0) + TRACE cranelift_codegen::egraph > -> inst3 = UnaryImm { opcode: Iconst, imm: Imm64(4) } + TRACE cranelift_codegen::egraph > -> v5 = Param(block1, 0) + TRACE cranelift_codegen::egraph > stats: Stats { pure_inst: 4, pure_inst_deduped: 0, skeleton_inst: 2, alias_analysis_removed: 0, new_inst: 0, union: 0, subsume: 0, remat: 4, rewrite_rule_invoked: 4, rewrite_depth_limit: 0, elaborate_visit_node: 0, elaborate_memoize_hit: 0, elaborate_memoize_miss: 0, elaborate_memoize_miss_remat: 0, elaborate_licm_hoist: 0, elaborate_func: 0, elaborate_func_pre_insts: 0, elaborate_func_post_insts: 0 } + TRACE cranelift_codegen::egraph::elaborate > computing best for value v0 def Param(block0, 0) + TRACE cranelift_codegen::egraph::elaborate > best for eclass v0: (Cost(0), v0) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v1 def Result(inst0, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v1: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v1: (Cost(0), v1) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v2 def Result(inst1, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v2: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v2: (Cost(0), v2) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v3 def Result(inst2, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v3: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v3: (Cost(0), v3) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v4 def Result(inst3, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v4: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v4: (Cost(0), v4) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v5 def Param(block1, 0) + TRACE cranelift_codegen::egraph::elaborate > best for eclass v5: (Cost(0), v5) + TRACE cranelift_codegen::egraph::elaborate > elaborate_block: block block0 + TRACE cranelift_codegen::egraph::elaborate > start_block: block block0 with idom None at loop depth 0 scope depth 1 + TRACE cranelift_codegen::egraph::elaborate > block block0: loop stack is [] + TRACE cranelift_codegen::egraph::elaborate > elaborating inst inst4 with results [] + TRACE cranelift_codegen::egraph::elaborate > -> inserting before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> arg v0 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v0 canonical v0 before inst4 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v0 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v0 -> best v0 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v0 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block0, value: v0 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v4 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v4 canonical v4 before inst4 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v4 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v4 -> best v4 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v4 is result 0 of inst3 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(4) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst3 result 0 args 0 remat true before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst4 insert_block block0 + TRACE cranelift_codegen::egraph::elaborate > need inst inst3 before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v4 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block0, value: v4 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v1 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v1 canonical v1 before inst4 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v1 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v1 -> best v1 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v1 is result 0 of inst0 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst0 result 0 args 0 remat true before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst4 insert_block block0 + TRACE cranelift_codegen::egraph::elaborate > need inst inst0 before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v1 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block0, value: v1 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 canonical v2 before inst4 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 -> best v2 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v2 is result 0 of inst1 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(2) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst1 result 0 args 0 remat true before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst4 insert_block block0 + TRACE cranelift_codegen::egraph::elaborate > need inst inst1 before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v2 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block0, value: v2 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 canonical v2 before inst4 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 -> best v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 -> ElaboratedValue { in_block: block0, value: v2 } + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block0, value: v2 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v3 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v3 canonical v3 before inst4 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v3 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v3 -> best v3 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v3 is result 0 of inst2 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(3) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst2 result 0 args 0 remat true before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst4 insert_block block0 + TRACE cranelift_codegen::egraph::elaborate > need inst inst2 before inst4 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v3 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block0, value: v3 } + TRACE cranelift_codegen::egraph::elaborate > elaborate_block: block block1 + TRACE cranelift_codegen::egraph::elaborate > start_block: block block1 with idom Some(block0) at loop depth 0 scope depth 2 + TRACE cranelift_codegen::egraph::elaborate > block block1: loop stack is [] + TRACE cranelift_codegen::egraph::elaborate > elaborating inst inst5 with results [] + TRACE cranelift_codegen::egraph::elaborate > -> inserting before inst5 + TRACE cranelift_codegen::egraph::elaborate > -> arg v5 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v5 canonical v5 before inst5 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v5 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v5 -> best v5 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v5 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block1, value: v5 } + DEBUG cranelift_codegen::context > egraph stats: Stats { pure_inst: 4, pure_inst_deduped: 0, skeleton_inst: 2, alias_analysis_removed: 0, new_inst: 0, union: 0, subsume: 0, remat: 4, rewrite_rule_invoked: 4, rewrite_depth_limit: 0, elaborate_visit_node: 7, elaborate_memoize_hit: 1, elaborate_memoize_miss: 6, elaborate_memoize_miss_remat: 0, elaborate_licm_hoist: 0, elaborate_func: 1, elaborate_func_pre_insts: 6, elaborate_func_post_insts: 6 } + TRACE cranelift_codegen::context > After egraph optimization: +function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v4 = iconst.i32 4 + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + DEBUG cranelift_codegen::timing > timing: Ending Egraph based optimizations + TRACE cranelift_codegen::machinst::abi > ABISig: sig Signature { params: [AbiParam { value_type: types::I32, purpose: Normal, extension: None }], returns: [AbiParam { value_type: types::I32, purpose: Normal, extension: None }], call_conv: SystemV } => args end = 2 rets end = 1 + arg stack = 0 ret stack = 0 stack_ret_arg = false + TRACE cranelift_codegen::machinst::abi > ABI: func signature Signature { params: [AbiParam { value_type: types::I32, purpose: Normal, extension: None }], returns: [AbiParam { value_type: types::I32, purpose: Normal, extension: None }], call_conv: SystemV } + TRACE cranelift_codegen::machinst::blockorder > BlockLoweringOrder: function body function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v4 = iconst.i32 4 + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + TRACE cranelift_codegen::machinst::blockorder > BlockLoweringOrder: BlockLoweringOrder { + lowered_order: [ + Orig { + block: block0, + }, + CriticalEdge { + pred: block0, + succ: block1, + succ_idx: 0, + }, + CriticalEdge { + pred: block0, + succ: block1, + succ_idx: 1, + }, + CriticalEdge { + pred: block0, + succ: block1, + succ_idx: 2, + }, + CriticalEdge { + pred: block0, + succ: block1, + succ_idx: 3, + }, + CriticalEdge { + pred: block0, + succ: block1, + succ_idx: 4, + }, + Orig { + block: block1, + }, + ], + lowered_succ_indices: [ + Block( + 1, + ), + Block( + 2, + ), + Block( + 3, + ), + Block( + 4, + ), + Block( + 5, + ), + Block( + 6, + ), + Block( + 6, + ), + Block( + 6, + ), + Block( + 6, + ), + Block( + 6, + ), + ], + lowered_succ_ranges: [ + ( + Some( + inst4, + ), + 0..5, + ), + ( + None, + 5..6, + ), + ( + None, + 6..7, + ), + ( + None, + 7..8, + ), + ( + None, + 8..9, + ), + ( + None, + 9..10, + ), + ( + None, + 10..10, + ), + ], + cold_blocks: {}, + indirect_branch_targets: { + Block( + 5, + ), + Block( + 2, + ), + Block( + 4, + ), + Block( + 1, + ), + Block( + 6, + ), + Block( + 3, + ), + }, +} + TRACE cranelift_codegen::machinst::lower > bb block0 param v0: regs ValueRegs { parts: [v128, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst3 (UnaryImm { opcode: Iconst, imm: Imm64(4) }): result v4 regs ValueRegs { parts: [v129, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst0 (UnaryImm { opcode: Iconst, imm: Imm64(1) }): result v1 regs ValueRegs { parts: [v130, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst1 (UnaryImm { opcode: Iconst, imm: Imm64(2) }): result v2 regs ValueRegs { parts: [v131, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst2 (UnaryImm { opcode: Iconst, imm: Imm64(3) }): result v3 regs ValueRegs { parts: [v132, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block1 param v5: regs ValueRegs { parts: [v133, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst3 has color 1 + TRACE cranelift_codegen::machinst::lower > -> constant: 4 + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst0 has color 1 + TRACE cranelift_codegen::machinst::lower > -> constant: 1 + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst1 has color 1 + TRACE cranelift_codegen::machinst::lower > -> constant: 2 + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst2 has color 1 + TRACE cranelift_codegen::machinst::lower > -> constant: 3 + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst4 has color 1 + TRACE cranelift_codegen::machinst::lower > -> side-effecting; incrementing color for next inst + TRACE cranelift_codegen::machinst::lower > bb block1 inst inst5 has color 3 + TRACE cranelift_codegen::machinst::lower > -> side-effecting; incrementing color for next inst + TRACE cranelift_codegen::machinst::lower > arg v0 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v4 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v1 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v2 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v2 used, old state Once, new Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v2 onto stack + TRACE cranelift_codegen::machinst::lower > arg v3 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v5 used, old state Unused, new Once + DEBUG cranelift_codegen::machinst::compile > Number of CLIF instructions to lower: 6 + DEBUG cranelift_codegen::machinst::compile > Number of CLIF blocks to lower: 2 + DEBUG cranelift_codegen::timing > timing: Starting VCode lowering, (during Compilation passes) + TRACE cranelift_codegen::machinst::lower > about to lower function: function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v4 = iconst.i32 4 + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} + + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block1 inst inst5 (MultiAry { opcode: Return, args: EntityList { index: 45, unused: PhantomData } }) is_branch false side_effect true value_needed false + TRACE cranelift_codegen::machinst::lower > lowering: inst inst5: MultiAry { opcode: Return, args: EntityList { index: 45, unused: PhantomData } } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v5 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v133, v2097151] } + TRACE cranelift_codegen::machinst::lower > emit: ret %v133=%rax + TRACE cranelift_codegen::machinst::lower > emit: jmp label6 + TRACE cranelift_codegen::machinst::lower > emit: jmp label6 + TRACE cranelift_codegen::machinst::lower > emit: jmp label6 + TRACE cranelift_codegen::machinst::lower > emit: jmp label6 + TRACE cranelift_codegen::machinst::lower > emit: jmp label6 + TRACE cranelift_codegen::machinst::lower > lower_clif_branches: block block0 branch inst4 targets [MachLabel(1), MachLabel(2), MachLabel(3), MachLabel(4), MachLabel(5)] + TRACE cranelift_codegen::machinst::lower > emit: movl $4, %v139l + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v0 at cur_inst Some(inst4) cur_scan_entry_color None + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v0 at cur_inst Some(inst4) cur_scan_entry_color None + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v0 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v128, v2097151] } + TRACE cranelift_codegen::machinst::lower > emit: movl %v128l, %v140l + TRACE cranelift_codegen::machinst::lower > emit: cmpl %v139l, %v140l + TRACE cranelift_codegen::machinst::lower > emit: cmovbl %v140l, %v139l, %v141l + TRACE cranelift_codegen::machinst::lower > emit: br_table %v141, %v142, %v143 + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v4 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v129, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v1 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v130, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v2 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v131, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v2 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v131, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v3 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v132, v2097151] } + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst4 (BranchTable { opcode: BrTable, arg: v0, table: jt0 }) is_branch true side_effect true value_needed false + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst2 (UnaryImm { opcode: Iconst, imm: Imm64(3) }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst2: UnaryImm { opcode: Iconst, imm: Imm64(3) } + TRACE cranelift_codegen::machinst::lower > emit: movl $3, %v144l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v132 to v144 + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst1 (UnaryImm { opcode: Iconst, imm: Imm64(2) }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst1: UnaryImm { opcode: Iconst, imm: Imm64(2) } + TRACE cranelift_codegen::machinst::lower > emit: movl $2, %v145l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v131 to v145 + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst0 (UnaryImm { opcode: Iconst, imm: Imm64(1) }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst0: UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::machinst::lower > emit: movl $1, %v146l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v130 to v146 + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst3 (UnaryImm { opcode: Iconst, imm: Imm64(4) }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst3: UnaryImm { opcode: Iconst, imm: Imm64(4) } + TRACE cranelift_codegen::machinst::lower > emit: movl $4, %v147l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v129 to v147 + TRACE cranelift_codegen::machinst::lower > gen_arg_setup: entry BB block0 args are: +[v0] + TRACE cranelift_codegen::machinst::abi > gen_retval_area_setup: not needed + TRACE cranelift_codegen::machinst::lower > emit: args %v128=%rdi + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 134, class = Int) -> VReg(vreg = 134, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 135, class = Int) -> VReg(vreg = 135, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 136, class = Int) -> VReg(vreg = 136, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 137, class = Int) -> VReg(vreg = 137, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 138, class = Int) -> VReg(vreg = 138, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 129, class = Int) -> VReg(vreg = 147, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 130, class = Int) -> VReg(vreg = 146, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 131, class = Int) -> VReg(vreg = 145, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 131, class = Int) -> VReg(vreg = 145, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 132, class = Int) -> VReg(vreg = 144, class = Int) + TRACE cranelift_codegen::machinst::lower > built vcode: VCode { + Entry block: 0 + v129 := v147 + v130 := v146 + v131 := v145 + v132 := v144 +Block 0: + (original IR block: block0) + (successor: Block 1) + (successor: Block 2) + (successor: Block 3) + (successor: Block 4) + (successor: Block 5) + (instruction range: 0 .. 10) + Inst 0: args %v128=%rdi + Inst 1: movl $4, %v147l + Inst 2: movl $1, %v146l + Inst 3: movl $2, %v145l + Inst 4: movl $3, %v144l + Inst 5: movl $4, %v139l + Inst 6: movl %v128l, %v140l + Inst 7: cmpl %v139l, %v140l + Inst 8: cmovbl %v140l, %v139l, %v141l + Inst 9: br_table %v141, %v142, %v143 +Block 1: + (successor: Block 6) + (instruction range: 10 .. 11) + Inst 10: jmp label6 +Block 2: + (successor: Block 6) + (instruction range: 11 .. 12) + Inst 11: jmp label6 +Block 3: + (successor: Block 6) + (instruction range: 12 .. 13) + Inst 12: jmp label6 +Block 4: + (successor: Block 6) + (instruction range: 13 .. 14) + Inst 13: jmp label6 +Block 5: + (successor: Block 6) + (instruction range: 14 .. 15) + Inst 14: jmp label6 +Block 6: + (original IR block: block1) + (instruction range: 15 .. 16) + Inst 15: ret %v133=%rax +} + + DEBUG cranelift_codegen::timing > timing: Ending VCode lowering + DEBUG cranelift_codegen::machinst::compile > Number of lowered vcode instructions: 16 + DEBUG cranelift_codegen::machinst::compile > Number of lowered vcode blocks: 7 + TRACE cranelift_codegen::machinst::compile > vcode from lowering: +VCode { + Entry block: 0 + v129 := v147 + v130 := v146 + v131 := v145 + v132 := v144 +Block 0: + (original IR block: block0) + (successor: Block 1) + (successor: Block 2) + (successor: Block 3) + (successor: Block 4) + (successor: Block 5) + (instruction range: 0 .. 10) + Inst 0: args %v128=%rdi + Inst 1: movl $4, %v147l + Inst 2: movl $1, %v146l + Inst 3: movl $2, %v145l + Inst 4: movl $3, %v144l + Inst 5: movl $4, %v139l + Inst 6: movl %v128l, %v140l + Inst 7: cmpl %v139l, %v140l + Inst 8: cmovbl %v140l, %v139l, %v141l + Inst 9: br_table %v141, %v142, %v143 +Block 1: + (successor: Block 6) + (instruction range: 10 .. 11) + Inst 10: jmp label6 +Block 2: + (successor: Block 6) + (instruction range: 11 .. 12) + Inst 11: jmp label6 +Block 3: + (successor: Block 6) + (instruction range: 12 .. 13) + Inst 12: jmp label6 +Block 4: + (successor: Block 6) + (instruction range: 13 .. 14) + Inst 13: jmp label6 +Block 5: + (successor: Block 6) + (instruction range: 14 .. 15) + Inst 14: jmp label6 +Block 6: + (original IR block: block1) + (instruction range: 15 .. 16) + Inst 15: ret %v133=%rax +} + + DEBUG cranelift_codegen::timing > timing: Starting Register allocation, (during Compilation passes) + TRACE regalloc2::ion::fast_alloc > Allocating block 0 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 0 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 0) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v128i fixed(p7i) + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 0 + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v128i fixed(p7i) + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 1 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 1) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v147i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v147i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 2 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 2) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v146i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v146i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 3 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 3) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v145i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v145i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 4 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 4) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v144i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v144i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 5 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 5) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v139i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v139i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 6 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 6) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v140i reg + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v128i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v128i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 1 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v140i reg + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 7 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 8) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v140i reg + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v139i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v140i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v139i reg + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 1 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 8 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 10) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v139i reg + TRACE regalloc2::ion::fast_alloc > Operand 1: Def: v141i reuse(0) + TRACE regalloc2::ion::fast_alloc > Operand 2: Use: v140i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v139i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Operand 2: Use: v140i reg + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 2 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 1: Def: v141i reuse(0) + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 9 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 13) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v141i reg + TRACE regalloc2::ion::fast_alloc > Operand 1: Def@Early: v142i reg + TRACE regalloc2::ion::fast_alloc > Operand 2: Def: v143i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v141i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Operand 1: Def@Early: v142i reg + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 1 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 2: Def: v143i reg + TRACE regalloc2::ion::fast_alloc > Chose p0i for operand 2 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Clearing p0i + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 0 + TRACE regalloc2::ion::fast_alloc > Successors not allocated. Creating allocation + TRACE regalloc2::ion::fast_alloc > Creating block 1 + TRACE regalloc2::ion::fast_alloc > Creating block 2 + TRACE regalloc2::ion::fast_alloc > Creating block 3 + TRACE regalloc2::ion::fast_alloc > Creating block 4 + TRACE regalloc2::ion::fast_alloc > Creating block 5 + TRACE regalloc2::ion::fast_alloc > Allocating block 1 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 14 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 16) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 5 + TRACE regalloc2::ion::fast_alloc > Successors not allocated. Creating allocation + TRACE regalloc2::ion::fast_alloc > Creating block 6 + TRACE regalloc2::ion::fast_alloc > Allocating block 2 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 13 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 16) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 4 + TRACE regalloc2::ion::fast_alloc > Only one allocated successor, moving allocations + TRACE regalloc2::ion::fast_alloc > Allocating block 3 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 12 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 16) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 3 + TRACE regalloc2::ion::fast_alloc > Only one allocated successor, moving allocations + TRACE regalloc2::ion::fast_alloc > Allocating block 4 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 11 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 16) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 2 + TRACE regalloc2::ion::fast_alloc > Only one allocated successor, moving allocations + TRACE regalloc2::ion::fast_alloc > Allocating block 5 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 10 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 16) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 1 + TRACE regalloc2::ion::fast_alloc > Only one allocated successor, moving allocations + TRACE regalloc2::ion::fast_alloc > Allocating block 6 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 15 (refs_on_stack: false, is_ret: true, is_branch: false, alloc_idx: 16) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v133i fixed(p0i) + TRACE regalloc2::ion::fast_alloc > Chose p0i for operand 0 + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v133i fixed(p0i) + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Clearing p0i + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 6 + TRACE regalloc2::ion::fast_alloc > Last inst 15 is not a branch + TRACE regalloc2::ion::fast_alloc > Edits: + TRACE regalloc2::ion::fast_alloc > At progpoint0-post from p7i to stack0 + TRACE regalloc2::ion::fast_alloc > At progpoint1-post from p6i to stack1 + TRACE regalloc2::ion::fast_alloc > At progpoint2-post from p6i to stack2 + TRACE regalloc2::ion::fast_alloc > At progpoint3-post from p6i to stack3 + TRACE regalloc2::ion::fast_alloc > At progpoint4-post from p6i to stack4 + TRACE regalloc2::ion::fast_alloc > At progpoint5-post from p6i to stack5 + TRACE regalloc2::ion::fast_alloc > At progpoint6-pre from stack0 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint6-post from p7i to stack6 + TRACE regalloc2::ion::fast_alloc > At progpoint7-pre from stack6 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint7-pre from stack5 to p7i + TRACE regalloc2::ion::fast_alloc > At progpoint8-pre from stack5 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint8-pre from stack6 to p7i + TRACE regalloc2::ion::fast_alloc > At progpoint8-post from p6i to stack7 + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from stack7 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from stack1 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from p6i to stack10 + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from stack2 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from p6i to stack11 + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from stack3 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from p6i to stack12 + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from stack4 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from p6i to stack13 + TRACE regalloc2::ion::fast_alloc > At progpoint9-post from p7i to stack8 + TRACE regalloc2::ion::fast_alloc > At progpoint9-post from p0i to stack9 + TRACE regalloc2::ion::fast_alloc > At progpoint10-pre from stack10 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint10-pre from p6i to stack14 + TRACE regalloc2::ion::fast_alloc > At progpoint11-pre from stack11 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint11-pre from p6i to stack14 + TRACE regalloc2::ion::fast_alloc > At progpoint12-pre from stack12 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint12-pre from p6i to stack14 + TRACE regalloc2::ion::fast_alloc > At progpoint13-pre from stack12 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint13-pre from p6i to stack14 + TRACE regalloc2::ion::fast_alloc > At progpoint14-pre from stack13 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint14-pre from p6i to stack14 + TRACE regalloc2::ion::fast_alloc > At progpoint15-pre from stack14 to p0i + DEBUG cranelift_codegen::timing > timing: Ending Register allocation + DEBUG cranelift_codegen::timing > timing: Starting VCode emission, (during Compilation passes) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: first 7 labels are for blocks + TRACE cranelift_codegen::machinst::buffer > MachBuffer: next 0 labels are for constants + TRACE cranelift_codegen::machinst::vcode > emitting block Block(0) + TRACE cranelift_codegen::machinst::vcode > -> entry block + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 0: 55 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 1: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 2: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 3: e5 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 4: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 5: 81 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 6: ec + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 7: 80 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(0) at offset 11 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [] + l = [MachLabel(0)] + f = [] + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [] + l = [MachLabel(0)] + f = [] + TRACE cranelift_codegen::machinst::vcode > Emitting inst 0 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p7i to slot 0 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 0 } -> sp_off 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 11: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 12: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 13: 3c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 14: 24 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 1 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 15: be + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 16: 4 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 1 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 1 } -> sp_off 8 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 20: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 21: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 22: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 23: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 24: 8 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 2 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 25: be + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 26: 1 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 2 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 2 } -> sp_off 16 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 30: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 31: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 32: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 33: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 34: 10 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 3 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 35: be + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 36: 2 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 3 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 3 } -> sp_off 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 40: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 41: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 42: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 43: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 44: 18 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 4 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 45: be + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 46: 3 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 4 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 4 } -> sp_off 32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 50: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 51: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 52: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 53: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 54: 20 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 5 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 55: be + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 56: 4 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 5 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 5 } -> sp_off 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 60: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 61: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 62: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 63: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 64: 28 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 0 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 0 } -> sp_off 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 65: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 66: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 67: 34 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 68: 24 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 6 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 69: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 70: fe + TRACE cranelift_codegen::machinst::vcode > Emitting move from p7i to slot 6 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 6 } -> sp_off 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 71: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 72: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 73: 7c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 74: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 75: 30 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 6 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 6 } -> sp_off 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 76: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 77: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 78: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 79: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 80: 30 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 5 to p7i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 5 } -> sp_off 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 81: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 82: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 83: 7c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 84: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 85: 28 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 7 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 86: 39 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 87: fe + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 5 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 5 } -> sp_off 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 88: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 89: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 90: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 91: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 92: 28 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 6 to p7i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 6 } -> sp_off 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 93: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 94: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 95: 7c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 96: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 97: 30 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 8 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 98: f + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 99: 42 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 100: f7 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 7 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 7 } -> sp_off 56 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 101: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 102: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 103: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 104: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 105: 38 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 7 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 7 } -> sp_off 56 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 106: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 107: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 108: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 109: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 110: 38 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 1 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 1 } -> sp_off 8 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 111: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 112: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 113: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 114: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 115: 8 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 10 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 10 } -> sp_off 80 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 116: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 117: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 118: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 119: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 120: 50 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 2 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 2 } -> sp_off 16 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 121: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 122: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 123: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 124: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 125: 10 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 11 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 11 } -> sp_off 88 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 126: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 127: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 128: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 129: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 130: 58 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 3 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 3 } -> sp_off 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 131: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 132: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 133: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 134: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 135: 18 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 12 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 12 } -> sp_off 96 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 136: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 137: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 138: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 139: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 140: 60 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 4 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 4 } -> sp_off 32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 141: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 142: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 143: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 144: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 145: 20 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 13 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 13 } -> sp_off 104 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 146: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 147: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 148: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 149: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 150: 68 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: new label -> MachLabel(7) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 151: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 152: 8d + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 153: 3d + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 154 label MachLabel(7) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 154: 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 158: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 159: 63 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 160: 44 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 161: b7 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 162: 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 163: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 164: 1 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 165: c7 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 166: ff + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 167: e7 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(7) at offset 168 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [] + l = [MachLabel(7)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [] + l = [MachLabel(7)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 168 label MachLabel(2) kind PCRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 168: 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 172 label MachLabel(3) kind PCRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 172: 4 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 176 label MachLabel(4) kind PCRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 176: 8 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 180 label MachLabel(5) kind PCRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 180: c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 184 label MachLabel(1) kind PCRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 184: 10 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(1) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(1) at offset 188 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [] + l = [MachLabel(1)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }] + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [] + l = [MachLabel(1)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 10 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 10 } -> sp_off 80 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 188: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 189: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 190: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 191: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 192: 50 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 14 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 14 } -> sp_off 112 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 193: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 194: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 195: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 196: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 197: 70 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 10 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 199 label MachLabel(6) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 198: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 199: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(2) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(2) at offset 203 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(2)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] } at off 203 + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(2)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 11 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 11 } -> sp_off 88 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 203: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 204: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 205: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 206: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 207: 58 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 14 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 14 } -> sp_off 112 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 208: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 209: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 210: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 211: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 212: 70 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 11 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 214 label MachLabel(6) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 213: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 214: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(3) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(3) at offset 218 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(3)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] } at off 218 + TRACE cranelift_codegen::machinst::buffer > -> more than one branch; prev_b = MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(3)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 12 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 12 } -> sp_off 96 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 218: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 219: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 220: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 221: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 222: 60 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 14 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 14 } -> sp_off 112 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 223: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 224: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 225: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 226: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 227: 70 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 12 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 229 label MachLabel(6) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 228: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 229: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(4) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(4) at offset 233 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 228, end: 233, target: MachLabel(6), fixup: 8, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(4)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 228, end: 233, target: MachLabel(6), fixup: 8, inverted: None, labels_at_this_branch: [] } at off 233 + TRACE cranelift_codegen::machinst::buffer > -> more than one branch; prev_b = MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 228, end: 233, target: MachLabel(6), fixup: 8, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(4)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 12 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 12 } -> sp_off 96 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 233: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 234: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 235: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 236: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 237: 60 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 14 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 14 } -> sp_off 112 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 238: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 239: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 240: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 241: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 242: 70 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 13 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 244 label MachLabel(6) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 243: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 244: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(5) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(5) at offset 248 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 228, end: 233, target: MachLabel(6), fixup: 8, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 243, end: 248, target: MachLabel(6), fixup: 9, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(5)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 244, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 243, end: 248, target: MachLabel(6), fixup: 9, inverted: None, labels_at_this_branch: [] } at off 248 + TRACE cranelift_codegen::machinst::buffer > -> more than one branch; prev_b = MachBranch { start: 228, end: 233, target: MachLabel(6), fixup: 8, inverted: None, labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 228, end: 233, target: MachLabel(6), fixup: 8, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 243, end: 248, target: MachLabel(6), fixup: 9, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(5)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 244, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 13 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 13 } -> sp_off 104 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 248: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 249: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 250: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 251: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 252: 68 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 14 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 14 } -> sp_off 112 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 253: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 254: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 255: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 256: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 257: 70 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 14 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 259 label MachLabel(6) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 258: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 259: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(6) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(6) at offset 263 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 198, end: 203, target: MachLabel(6), fixup: 6, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 213, end: 218, target: MachLabel(6), fixup: 7, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 228, end: 233, target: MachLabel(6), fixup: 8, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 243, end: 248, target: MachLabel(6), fixup: 9, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 258, end: 263, target: MachLabel(6), fixup: 10, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(6)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 244, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 259, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 258, end: 263, target: MachLabel(6), fixup: 10, inverted: None, labels_at_this_branch: [] } at off 263 + TRACE cranelift_codegen::machinst::buffer > branch with target == cur off; truncating + TRACE cranelift_codegen::machinst::buffer > truncate_last_branch: truncated MachBranch { start: 258, end: 263, target: MachLabel(6), fixup: 10, inverted: None, labels_at_this_branch: [] }; off now 258 + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 243, end: 248, target: MachLabel(6), fixup: 9, inverted: None, labels_at_this_branch: [] } at off 258 + TRACE cranelift_codegen::machinst::buffer > purge_latest_branches: removing branch MachBranch { start: 243, end: 248, target: MachLabel(6), fixup: 9, inverted: None, labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [] + l = [MachLabel(6)] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 244, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 14 to p0i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 14 } -> sp_off 112 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 258: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 259: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 260: 44 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 261: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 262: 70 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 15 + TRACE cranelift_codegen::machinst::abi > Epilogue: [addq %rsp, $128, %rsp, movq %rbp, %rsp, popq %rbp, ret] + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 263: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 264: 81 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 265: c4 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 266: 80 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 270: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 271: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 272: ec + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 273: 5d + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 274: c3 + TRACE cranelift_codegen::machinst::vcode > Disassembly: + pushq %rbp + unwind PushFrameRegs { offset_upward_to_caller_sp: 16 } + movq %rsp, %rbp + unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } + subq %rsp, $128, %rsp +block0: + movq %rdi, rsp(0 + virtual offset) + movl $4, %esi + movq %rsi, rsp(8 + virtual offset) + movl $1, %esi + movq %rsi, rsp(16 + virtual offset) + movl $2, %esi + movq %rsi, rsp(24 + virtual offset) + movl $3, %esi + movq %rsi, rsp(32 + virtual offset) + movl $4, %esi + movq %rsi, rsp(40 + virtual offset) + movq rsp(0 + virtual offset), %rsi + movl %esi, %edi + movq %rdi, rsp(48 + virtual offset) + movq rsp(48 + virtual offset), %rsi + movq rsp(40 + virtual offset), %rdi + cmpl %edi, %esi + movq rsp(40 + virtual offset), %rsi + movq rsp(48 + virtual offset), %rdi + cmovbl %edi, %esi, %esi + movq %rsi, rsp(56 + virtual offset) + movq rsp(56 + virtual offset), %rsi + movq rsp(8 + virtual offset), %rsi + movq %rsi, rsp(80 + virtual offset) + movq rsp(16 + virtual offset), %rsi + movq %rsi, rsp(88 + virtual offset) + movq rsp(24 + virtual offset), %rsi + movq %rsi, rsp(96 + virtual offset) + movq rsp(32 + virtual offset), %rsi + movq %rsi, rsp(104 + virtual offset) + br_table %rsi, %rdi, %rax +block1: + movq rsp(80 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block2: + movq rsp(88 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block3: + movq rsp(96 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block4: + movq rsp(96 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block5: + movq rsp(104 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block6: + movq rsp(112 + virtual offset), %rax + addq %rsp, $128, %rsp + movq %rbp, %rsp + popq %rbp + ret + + DEBUG cranelift_codegen::timing > timing: Ending VCode emission + DEBUG cranelift_codegen::timing > timing: Starting VCode emission finalization, (during Compilation passes) + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [] + l = [] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 244, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [] + l = [] + f = [MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 }, MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 }, MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 }, MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 }, MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 }, MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 244, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(7), offset: 154, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 168, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(2), offset: 168, kind: PCRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 203, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(3), offset: 172, kind: PCRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 218, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(4), offset: 176, kind: PCRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 233, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(5), offset: 180, kind: PCRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 248, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(1), offset: 184, kind: PCRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 188, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(6), offset: 199, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 258, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(6), offset: 214, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 258, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(6), offset: 229, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 258, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(6), offset: 244, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 258, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + DEBUG cranelift_codegen::timing > timing: Ending VCode emission finalization + TRACE cranelift_codegen::isa::x64 > disassembly: + pushq %rbp + unwind PushFrameRegs { offset_upward_to_caller_sp: 16 } + movq %rsp, %rbp + unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } + subq %rsp, $128, %rsp +block0: + movq %rdi, rsp(0 + virtual offset) + movl $4, %esi + movq %rsi, rsp(8 + virtual offset) + movl $1, %esi + movq %rsi, rsp(16 + virtual offset) + movl $2, %esi + movq %rsi, rsp(24 + virtual offset) + movl $3, %esi + movq %rsi, rsp(32 + virtual offset) + movl $4, %esi + movq %rsi, rsp(40 + virtual offset) + movq rsp(0 + virtual offset), %rsi + movl %esi, %edi + movq %rdi, rsp(48 + virtual offset) + movq rsp(48 + virtual offset), %rsi + movq rsp(40 + virtual offset), %rdi + cmpl %edi, %esi + movq rsp(40 + virtual offset), %rsi + movq rsp(48 + virtual offset), %rdi + cmovbl %edi, %esi, %esi + movq %rsi, rsp(56 + virtual offset) + movq rsp(56 + virtual offset), %rsi + movq rsp(8 + virtual offset), %rsi + movq %rsi, rsp(80 + virtual offset) + movq rsp(16 + virtual offset), %rsi + movq %rsi, rsp(88 + virtual offset) + movq rsp(24 + virtual offset), %rsi + movq %rsi, rsp(96 + virtual offset) + movq rsp(32 + virtual offset), %rsi + movq %rsi, rsp(104 + virtual offset) + br_table %rsi, %rdi, %rax +block1: + movq rsp(80 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block2: + movq rsp(88 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block3: + movq rsp(96 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block4: + movq rsp(96 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block5: + movq rsp(104 + virtual offset), %rsi + movq %rsi, rsp(112 + virtual offset) + jmp label6 +block6: + movq rsp(112 + virtual offset), %rax + addq %rsp, $128, %rsp + movq %rbp, %rsp + popq %rbp + ret + + DEBUG cranelift_codegen::timing > timing: Ending Compilation passes diff --git a/Cargo.lock b/Cargo.lock new file mode 100644 index 0000000..e1c49bc --- /dev/null +++ b/Cargo.lock @@ -0,0 +1,550 @@ +# This file is automatically @generated by Cargo. +# It is not intended for manual editing. +version = 3 + +[[package]] +name = "ahash" +version = "0.8.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2c99f64d1e06488f620f932677e24bc6e2897582980441ae90a671415bd7ec2f" +dependencies = [ + "cfg-if", + "once_cell", + "version_check", +] + +[[package]] +name = "aho-corasick" +version = "0.7.20" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cc936419f96fa211c1b9166887b38e5e40b19958e5b895be7c1f93adec7071ac" +dependencies = [ + "memchr", +] + +[[package]] +name = "anyhow" +version = "1.0.66" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "216261ddc8289130e551ddcd5ce8a064710c0d064a4d2895c67151c92b5443f6" + +[[package]] +name = "arbitrary" +version = "1.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e2d098ff73c1ca148721f37baad5ea6a465a13f9573aba8641fbbbae8164a54e" + +[[package]] +name = "atty" +version = "0.2.14" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d9b39be18770d11421cdb1b9947a45dd3f37e93092cbf377614828a319d5fee8" +dependencies = [ + "hermit-abi", + "libc", + "winapi", +] + +[[package]] +name = "autocfg" +version = "1.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" + +[[package]] +name = "bitflags" +version = "1.3.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" + +[[package]] +name = "bumpalo" +version = "3.11.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "572f695136211188308f16ad2ca5c851a712c464060ae6974944458eb83880ba" + +[[package]] +name = "cfg-if" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" + +[[package]] +name = "cranelift" +version = "0.96.0" +dependencies = [ + "cranelift-codegen", + "cranelift-frontend", +] + +[[package]] +name = "cranelift-bforest" +version = "0.96.0" +dependencies = [ + "cranelift-entity", +] + +[[package]] +name = "cranelift-codegen" +version = "0.96.0" +dependencies = [ + "bumpalo", + "cranelift-bforest", + "cranelift-codegen-meta", + "cranelift-codegen-shared", + "cranelift-control", + "cranelift-entity", + "cranelift-isle", + "gimli", + "hashbrown 0.13.2", + "log", + "regalloc2", + "smallvec", + "target-lexicon", +] + +[[package]] +name = "cranelift-codegen-meta" +version = "0.96.0" +dependencies = [ + "cranelift-codegen-shared", +] + +[[package]] +name = "cranelift-codegen-shared" +version = "0.96.0" + +[[package]] +name = "cranelift-control" +version = "0.96.0" +dependencies = [ + "arbitrary", +] + +[[package]] +name = "cranelift-entity" +version = "0.96.0" + +[[package]] +name = "cranelift-frontend" +version = "0.96.0" +dependencies = [ + "cranelift-codegen", + "log", + "smallvec", + "target-lexicon", +] + +[[package]] +name = "cranelift-isle" +version = "0.96.0" + +[[package]] +name = "cranelift-jit" +version = "0.96.0" +dependencies = [ + "anyhow", + "cranelift-codegen", + "cranelift-control", + "cranelift-entity", + "cranelift-module", + "cranelift-native", + "libc", + "log", + "memmap2", + "region", + "target-lexicon", + "wasmtime-jit-icache-coherence", + "windows-sys", +] + +[[package]] +name = "cranelift-module" +version = "0.96.0" +dependencies = [ + "anyhow", + "cranelift-codegen", + "cranelift-control", +] + +[[package]] +name = "cranelift-native" +version = "0.96.0" +dependencies = [ + "cranelift-codegen", + "libc", + "target-lexicon", +] + +[[package]] +name = "cranelift-reader" +version = "0.96.0" +dependencies = [ + "anyhow", + "cranelift-codegen", + "smallvec", + "target-lexicon", +] + +[[package]] +name = "cranelift_test" +version = "0.1.0" +dependencies = [ + "cranelift", + "cranelift-frontend", + "cranelift-jit", + "cranelift-module", + "cranelift-native", + "cranelift-reader", + "iced-x86", + "pretty_env_logger", + "regalloc2", + "target-lexicon", +] + +[[package]] +name = "env_logger" +version = "0.7.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "44533bbbb3bb3c1fa17d9f2e4e38bbbaf8396ba82193c4cb1b6445d711445d36" +dependencies = [ + "atty", + "humantime", + "log", + "regex", + "termcolor", +] + +[[package]] +name = "fallible-iterator" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4443176a9f2c162692bd3d352d745ef9413eec5782a80d8fd6f8a1ac692a07f7" + +[[package]] +name = "gimli" +version = "0.27.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ad0a93d233ebf96623465aad4046a8d3aa4da22d4f4beba5388838c8a434bbb4" +dependencies = [ + "fallible-iterator", + "indexmap", + "stable_deref_trait", +] + +[[package]] +name = "hashbrown" +version = "0.12.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8a9ee70c43aaf417c914396645a0fa852624801b24ebb7ae78fe8272889ac888" + +[[package]] +name = "hashbrown" +version = "0.13.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "43a3c133739dddd0d2990f9a4bdf8eb4b21ef50e4851ca85ab661199821d510e" +dependencies = [ + "ahash", +] + +[[package]] +name = "hermit-abi" +version = "0.1.19" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "62b467343b94ba476dcb2500d242dadbb39557df889310ac77c5d99100aaac33" +dependencies = [ + "libc", +] + +[[package]] +name = "humantime" +version = "1.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "df004cfca50ef23c36850aaaa59ad52cc70d0e90243c3c7737a4dd32dc7a3c4f" +dependencies = [ + "quick-error", +] + +[[package]] +name = "iced-x86" +version = "1.17.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "158f5204401d08f91d19176112146d75e99b3cf745092e268fa7be33e09adcec" +dependencies = [ + "lazy_static", + "static_assertions", +] + +[[package]] +name = "indexmap" +version = "1.9.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "10a35a97730320ffe8e2d410b5d3b69279b98d2c14bdb8b70ea89ecf7888d41e" +dependencies = [ + "autocfg", + "hashbrown 0.12.3", +] + +[[package]] +name = "lazy_static" +version = "1.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646" + +[[package]] +name = "libc" +version = "0.2.135" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "68783febc7782c6c5cb401fbda4de5a9898be1762314da0bb2c10ced61f18b0c" + +[[package]] +name = "log" +version = "0.4.17" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "abb12e687cfb44aa40f41fc3978ef76448f9b6038cad6aef4259d3c095a2382e" +dependencies = [ + "cfg-if", +] + +[[package]] +name = "mach" +version = "0.3.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b823e83b2affd8f40a9ee8c29dbc56404c1e34cd2710921f2801e2cf29527afa" +dependencies = [ + "libc", +] + +[[package]] +name = "memchr" +version = "2.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2dffe52ecf27772e601905b7522cb4ef790d2cc203488bbd0e2fe85fcb74566d" + +[[package]] +name = "memmap2" +version = "0.2.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "723e3ebdcdc5c023db1df315364573789f8857c11b631a2fdfad7c00f5c046b4" +dependencies = [ + "libc", +] + +[[package]] +name = "once_cell" +version = "1.16.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "86f0b0d4bf799edbc74508c1e8bf170ff5f41238e5f8225603ca7caaae2b7860" + +[[package]] +name = "pretty_env_logger" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "926d36b9553851b8b0005f1275891b392ee4d2d833852c417ed025477350fb9d" +dependencies = [ + "env_logger", + "log", +] + +[[package]] +name = "quick-error" +version = "1.2.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a1d01941d82fa2ab50be1e79e6714289dd7cde78eba4c074bc5a4374f650dfe0" + +[[package]] +name = "regalloc2" +version = "0.6.1" +dependencies = [ + "hashbrown 0.13.2", + "log", + "rustc-hash", + "slice-group-by", + "smallvec", +] + +[[package]] +name = "regex" +version = "1.7.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8b1f693b24f6ac912f4893ef08244d70b6067480d2f1a46e950c9691e6749d1d" +dependencies = [ + "aho-corasick", + "memchr", + "regex-syntax", +] + +[[package]] +name = "regex-syntax" +version = "0.6.29" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f162c6dd7b008981e4d40210aca20b4bd0f9b60ca9271061b07f78537722f2e1" + +[[package]] +name = "region" +version = "2.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "877e54ea2adcd70d80e9179344c97f93ef0dffd6b03e1f4529e6e83ab2fa9ae0" +dependencies = [ + "bitflags", + "libc", + "mach", + "winapi", +] + +[[package]] +name = "rustc-hash" +version = "1.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "08d43f7aa6b08d49f382cde6a7982047c3426db949b1424bc4b7ec9ae12c6ce2" + +[[package]] +name = "slice-group-by" +version = "0.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "03b634d87b960ab1a38c4fe143b508576f075e7c978bfad18217645ebfdfa2ec" + +[[package]] +name = "smallvec" +version = "1.10.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a507befe795404456341dfab10cef66ead4c041f62b8b11bbb92bffe5d0953e0" + +[[package]] +name = "stable_deref_trait" +version = "1.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3" + +[[package]] +name = "static_assertions" +version = "1.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f" + +[[package]] +name = "target-lexicon" +version = "0.12.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c02424087780c9b71cc96799eaeddff35af2bc513278cda5c99fc1f5d026d3c1" + +[[package]] +name = "termcolor" +version = "1.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "be55cf8942feac5c765c2c993422806843c9a9a45d4d5c407ad6dd2ea95eb9b6" +dependencies = [ + "winapi-util", +] + +[[package]] +name = "version_check" +version = "0.9.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f" + +[[package]] +name = "wasmtime-jit-icache-coherence" +version = "9.0.0" +dependencies = [ + "cfg-if", + "libc", + "windows-sys", +] + +[[package]] +name = "winapi" +version = "0.3.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5c839a674fcd7a98952e593242ea400abe93992746761e38641405d28b00f419" +dependencies = [ + "winapi-i686-pc-windows-gnu", + "winapi-x86_64-pc-windows-gnu", +] + +[[package]] +name = "winapi-i686-pc-windows-gnu" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ac3b87c63620426dd9b991e5ce0329eff545bccbbb34f3be09ff6fb6ab51b7b6" + +[[package]] +name = "winapi-util" +version = "0.1.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "70ec6ce85bb158151cae5e5c87f95a8e97d2c0c4b001223f33a334e3ce5de178" +dependencies = [ + "winapi", +] + +[[package]] +name = "winapi-x86_64-pc-windows-gnu" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" + +[[package]] +name = "windows-sys" +version = "0.45.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "75283be5efb2831d37ea142365f009c02ec203cd29a3ebecbc093d52315b66d0" +dependencies = [ + "windows-targets", +] + +[[package]] +name = "windows-targets" +version = "0.42.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e5180c00cd44c9b1c88adb3693291f1cd93605ded80c250a75d472756b4d071" +dependencies = [ + "windows_aarch64_gnullvm", + "windows_aarch64_msvc", + "windows_i686_gnu", + "windows_i686_msvc", + "windows_x86_64_gnu", + "windows_x86_64_gnullvm", + "windows_x86_64_msvc", +] + +[[package]] +name = "windows_aarch64_gnullvm" +version = "0.42.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "597a5118570b68bc08d8d59125332c54f1ba9d9adeedeef5b99b02ba2b0698f8" + +[[package]] +name = "windows_aarch64_msvc" +version = "0.42.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e08e8864a60f06ef0d0ff4ba04124db8b0fb3be5776a5cd47641e942e58c4d43" + +[[package]] +name = "windows_i686_gnu" +version = "0.42.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c61d927d8da41da96a81f029489353e68739737d3beca43145c8afec9a31a84f" + +[[package]] +name = "windows_i686_msvc" +version = "0.42.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "44d840b6ec649f480a41c8d80f9c65108b92d89345dd94027bfe06ac444d1060" + +[[package]] +name = "windows_x86_64_gnu" +version = "0.42.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8de912b8b8feb55c064867cf047dda097f92d51efad5b491dfb98f6bbb70cb36" + +[[package]] +name = "windows_x86_64_gnullvm" +version = "0.42.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "26d41b46a36d453748aedef1486d5c7a85db22e56aff34643984ea85514e94a3" + +[[package]] +name = "windows_x86_64_msvc" +version = "0.42.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9aec5da331524158c6d1a4ac0ab1541149c0b9505fde06423b02f5ef0106b9f0" diff --git a/Cargo.toml b/Cargo.toml new file mode 100644 index 0000000..9d8ed5e --- /dev/null +++ b/Cargo.toml @@ -0,0 +1,19 @@ +[package] +name = "cranelift_test" +version = "0.1.0" +edition = "2021" + +# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html + +[dependencies] +cranelift = { path = "../wasmtime/cranelift/umbrella" } +cranelift-module = { path = "../wasmtime/cranelift/module" } +cranelift-jit = { path = "../wasmtime/cranelift/jit", features = ["selinux-fix"] } +cranelift-frontend = { path = "../wasmtime/cranelift/frontend" } +target-lexicon = "0.12.4" +cranelift-native = { path = "../wasmtime/cranelift/native" } +cranelift-reader = { path = "../wasmtime/cranelift/reader" } +regalloc2 = { path = "../regalloc2", features = ["trace-log"] } +pretty_env_logger = "0.4.0" + +iced-x86 = "1.17.0" \ No newline at end of file diff --git a/src/main.rs b/src/main.rs new file mode 100644 index 0000000..1349350 --- /dev/null +++ b/src/main.rs @@ -0,0 +1,652 @@ +use cranelift::codegen::ir::{function, BlockCall, FuncRef, InstructionData, Opcode, ValueList}; +use cranelift::codegen::isa; +use cranelift::codegen::settings::{self, Configurable}; +use cranelift::prelude::*; +use cranelift_frontend::FunctionBuilderContext; +use cranelift_jit::{JITBuilder, JITModule}; +use cranelift_module::{DataDescription, FuncId, Linkage, Module}; + +extern "C" fn extern_fn(test: u64) -> i64 { + test as i64 - 40 +} + +fn main() { + pretty_env_logger::init(); + let mut shared_builder = settings::builder(); + for setting in shared_builder.iter() { + println!("{:?}", setting); + } + shared_builder + .set("use_colocated_libcalls", "false") + .unwrap(); + shared_builder.set("is_pic", "true").unwrap(); + shared_builder + .set("preserve_frame_pointers", "true") + .unwrap(); + shared_builder.set("opt_level", "speed").unwrap(); + shared_builder.set("enable_verifier", "true").unwrap(); + shared_builder + .set("enable_llvm_abi_extensions", "true") + .unwrap(); + let shared_flags = settings::Flags::new(shared_builder); + + println!("ISA:"); + let isa = { + let isa_builder = cranelift_native::builder_with_options(false).unwrap_or_else(|msg| { + panic!("host machine is not supported: {}", msg); + }); + for setting in isa_builder.iter() { + println!("{:?}", setting); + } + isa_builder.finish(shared_flags).unwrap() + }; + + let mut builder = JITBuilder::with_isa(isa, cranelift_module::default_libcall_names()); + builder.symbol("extern_fn", (extern_fn as *const ()) as *const u8); + + let mut module = JITModule::new(builder); + + let txt = std::fs::read_to_string(std::env::args().nth(1).unwrap()).unwrap(); + let fns = cranelift_reader::parse_functions(&txt).unwrap(); + println!("Len: {}", fns.len()); + + println!("Function:\n{}", fns[0].display()); + let mut ctx = module.make_context(); + + for func_idx in 0..fns.len() { + ctx.set_disasm(true); + println!("Compiling Func {} ('{}')", func_idx, fns[func_idx].name); + + ctx.func = fns[func_idx].clone(); + + let func = module + .declare_function( + &format!("test_func{}", func_idx), + Linkage::Export, + &ctx.func.signature, + ) + .unwrap(); + + module.define_function(func, &mut ctx).unwrap(); + println!( + "Disasm:\n{}", + ctx.compiled_code().unwrap().vcode.as_ref().unwrap() + ); + + if true { + println!("Asm2:"); + use iced_x86::Formatter; + let bytes = ctx.compiled_code().unwrap().code_buffer(); + let mut decoder = iced_x86::Decoder::new(64, bytes, iced_x86::DecoderOptions::NONE); + + // Formatters: Masm*, Nasm*, Gas* (AT&T) and Intel* (XED). + // For fastest code, see `SpecializedFormatter` which is ~3.3x faster. Use it if formatting + // speed is more important than being able to re-assemble formatted instructions. + let mut formatter = iced_x86::NasmFormatter::new(); + + // Change some options, there are many more + formatter.options_mut().set_digit_separator("`"); + formatter.options_mut().set_first_operand_char_index(10); + + // String implements FormatterOutput + let mut output = String::new(); + + // Initialize this outside the loop because decode_out() writes to every field + let mut instruction = iced_x86::Instruction::default(); + + // The decoder also implements Iterator/IntoIterator so you could use a for loop: + // for instruction in &mut decoder { /* ... */ } + // or collect(): + // let instructions: Vec<_> = decoder.into_iter().collect(); + // but can_decode()/decode_out() is a little faster: + while decoder.can_decode() { + // There's also a decode() method that returns an instruction but that also + // means it copies an instruction (40 bytes): + // instruction = decoder.decode(); + decoder.decode_out(&mut instruction); + + // Format the instruction ("disassemble" it) + output.clear(); + formatter.format(&instruction, &mut output); + + // Eg. "00007FFAC46ACDB2 488DAC2400FFFFFF lea rbp,[rsp-100h]" + print!("{:08X} ", instruction.ip()); + let start_index = instruction.ip() as usize; + let instr_bytes = &bytes[start_index..start_index + instruction.len()]; + for b in instr_bytes.iter() { + print!("{:02X}", b); + } + if instr_bytes.len() < 10 { + for _ in 0..10 - instr_bytes.len() { + print!(" "); + } + } + println!(" {}", output); + } + } + + module.clear_context(&mut ctx); + } +} + +/*fn main() { + let mut shared_builder = settings::builder(); + for setting in shared_builder.iter() { + println!("{:?}", setting); + } + shared_builder + .set("use_colocated_libcalls", "false") + .unwrap(); + shared_builder.set("is_pic", "true").unwrap(); + shared_builder + .set("preserve_frame_pointers", "true") + .unwrap(); + shared_builder.set("opt_level", "speed").unwrap(); + shared_builder.set("enable_verifier", "true").unwrap(); + shared_builder + .set("enable_llvm_abi_extensions", "true") + .unwrap(); + let shared_flags = settings::Flags::new(shared_builder); + + println!("ISA:"); + let isa = { + let isa_builder = cranelift_native::builder().unwrap_or_else(|msg| { + panic!("host machine is not supported: {}", msg); + }); + for setting in isa_builder.iter() { + println!("{:?}", setting); + } + isa_builder.finish(shared_flags).unwrap() + }; + + let mut builder = JITBuilder::with_isa(isa, cranelift_module::default_libcall_names()); + builder.symbol("extern_fn", (extern_fn as *const ()) as *const u8); + + let mut module = JITModule::new(builder); + let mut extern_sig = Signature::new(isa::CallConv::SystemV); + extern_sig.params.push(AbiParam::new(types::I64)); + extern_sig.returns.push(AbiParam::new(types::I64)); + //extern_sig.params.push(AbiParam::new(types::I64)); + //extern_sig.params.push(AbiParam::new(types::I64)); + //extern_sig.params.push(AbiParam::new(types::I64)); + //extern_sig.params.push(AbiParam::new(types::I64)); + //extern_sig.params.push(AbiParam::new(types::I128)); + let extern_id = module + .declare_function("extern_fn", Linkage::Import, &extern_sig) + .unwrap(); + + let mut ctx = module.make_context(); + let mut data_ctx = DataDescription::new(); + ctx.set_disasm(true); + + let fn_ref = module.declare_func_in_func(extern_id, &mut ctx.func); + ctx.func.signature.params.push(AbiParam::new(types::I64)); + ctx.func.signature.params.push(AbiParam::new(types::I64)); + ctx.func.signature.returns.push(AbiParam::new(types::I64)); + //ctx.func.signature.returns.push(AbiParam::new(types::B1)); + + test1(&mut ctx, fn_ref); + // test2(&mut ctx); + //test3(&mut ctx, fn_ref); + + //ctx.cfg.compute(&ctx.func); + //ctx.domtree.compute(&ctx.func, &ctx.cfg); + + /*let mut builder_ctx = FunctionBuilderContext::new(); + + let mut func_builder = FunctionBuilder::new(&mut ctx.func, &mut builder_ctx); + let entry_block = func_builder.create_block(); + let block1 = func_builder.create_block(); + let block2 = func_builder.create_block(); + func_builder.append_block_params_for_function_params(entry_block); + + func_builder.switch_to_block(entry_block); + func_builder.seal_block(entry_block); + + let param0 = func_builder.block_params(entry_block)[0]; + let param1 = func_builder.block_params(entry_block)[1]; + func_builder.ins().brnz(param1, block1, &[param0]); + func_builder.ins().jump(block2, &[param0]); + func_builder.seal_block(block1); + func_builder.seal_block(block2); + + func_builder.switch_to_block(block1); + func_builder.append_block_param(block1, types::I64); + let const50 = func_builder.ins().iconst(types::I64, 50); + let call = func_builder.ins().call(fn_ref, &[const50]); + let call_res = func_builder.inst_results(call)[0]; + let param0 = func_builder.block_params(block1)[0]; + let add_val = func_builder.ins().iadd(param0, call_res); + func_builder.ins().return_(&[add_val]); + + func_builder.switch_to_block(block2); + func_builder.append_block_param(block2, types::I64); + let param0 = func_builder.block_params(block2)[0]; + let test_val = func_builder.ins().iconst(types::I64, 10); + let test_val2 = func_builder.ins().iconst(types::I64, -20); + let test2_val = func_builder.ins().iadd(test_val, test_val2); + let sub_val = func_builder.ins().iadd(param0, test2_val); + func_builder.ins().return_(&[sub_val]); + + func_builder.finalize();*/ + + /*ctx.verify(module.isa()).unwrap(); + let mut errors = cranelift::codegen::verifier::VerifierErrors::default(); + cranelift::codegen::verifier::verify_context( + &ctx.func, + &ctx.cfg, + &ctx.domtree, + module.isa(), + &mut errors, + ) + .unwrap();*/ + // TODO: umbra should not need this since it does constant folding by itself + //cranelift_preopt::optimize(&mut ctx, module.isa()).unwrap(); + //ctx.dce(module.isa()).unwrap(); + //ctx.verify(module.isa()).unwrap(); + + println!("Function: {}", ctx.func.display()); + + let func = module + .declare_function("test_func", Linkage::Export, &ctx.func.signature) + .unwrap(); + module.define_function(func, &mut ctx).unwrap(); + println!( + "Disasm:\n{}", + ctx.compiled_code().unwrap().vcode.as_ref().unwrap() + ); + + if true { + println!("Asm2:"); + use iced_x86::Formatter; + let bytes = ctx.compiled_code().unwrap().code_buffer(); + let mut decoder = iced_x86::Decoder::new(64, bytes, iced_x86::DecoderOptions::NONE); + + // Formatters: Masm*, Nasm*, Gas* (AT&T) and Intel* (XED). + // For fastest code, see `SpecializedFormatter` which is ~3.3x faster. Use it if formatting + // speed is more important than being able to re-assemble formatted instructions. + let mut formatter = iced_x86::NasmFormatter::new(); + + // Change some options, there are many more + formatter.options_mut().set_digit_separator("`"); + formatter.options_mut().set_first_operand_char_index(10); + + // String implements FormatterOutput + let mut output = String::new(); + + // Initialize this outside the loop because decode_out() writes to every field + let mut instruction = iced_x86::Instruction::default(); + + // The decoder also implements Iterator/IntoIterator so you could use a for loop: + // for instruction in &mut decoder { /* ... */ } + // or collect(): + // let instructions: Vec<_> = decoder.into_iter().collect(); + // but can_decode()/decode_out() is a little faster: + while decoder.can_decode() { + // There's also a decode() method that returns an instruction but that also + // means it copies an instruction (40 bytes): + // instruction = decoder.decode(); + decoder.decode_out(&mut instruction); + + // Format the instruction ("disassemble" it) + output.clear(); + formatter.format(&instruction, &mut output); + + // Eg. "00007FFAC46ACDB2 488DAC2400FFFFFF lea rbp,[rsp-100h]" + print!("{:08X} ", instruction.ip()); + let start_index = instruction.ip() as usize; + let instr_bytes = &bytes[start_index..start_index + instruction.len()]; + for b in instr_bytes.iter() { + print!("{:02X}", b); + } + if instr_bytes.len() < 10 { + for _ in 0..10 - instr_bytes.len() { + print!(" "); + } + } + println!(" {}", output); + } + } + + module.clear_context(&mut ctx); + + module.finalize_definitions(); + + println!("Timing Info: {}", codegen::timing::take_current()); + + let code = module.get_finalized_function(func) as *const (); + + // run_test1(code); + //run_test2(code); +} + +fn test1(ctx: &mut codegen::Context, fn_ref: FuncRef) { + let entry_block = { + let b = ctx.func.dfg.make_block(); + ctx.func.layout.append_block(b); + ctx.func.dfg.append_block_param(b, types::I64); + ctx.func.dfg.append_block_param(b, types::I64); + b + }; + let block1 = { + let b = ctx.func.dfg.make_block(); + ctx.func.layout.append_block(b); + ctx.func.dfg.append_block_param(b, types::I64); + b + }; + let block2 = { + let b = ctx.func.dfg.make_block(); + ctx.func.layout.append_block(b); + ctx.func.dfg.append_block_param(b, types::I64); + b + }; + + let mut tmp_val = Value::from_u32(0); + // create entry block + { + let param0 = ctx.func.dfg.block_params(entry_block)[0]; + let param1 = ctx.func.dfg.block_params(entry_block)[1]; + + let const50 = { + // TODO: when taking immediates that are smaller than 64bit we need to call InstructionData::sign_extend_immediates to get them sign_extended to 64bit + let inst = ctx.func.dfg.make_inst(InstructionData::UnaryImm { + opcode: Opcode::Iconst, + imm: 50.into(), + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, entry_block); + ctx.func.dfg.first_result(inst) + }; + tmp_val = const50; + + let block1_call = ctx.func.dfg.block_call(block1, &[param0]); + let block2_call = ctx.func.dfg.block_call(block2, &[param0]); + + let inst = ctx.func.dfg.make_inst(InstructionData::Brif { + opcode: Opcode::Brif, + arg: param1, + blocks: [block1_call, block2_call], + }); + ctx.func.layout.append_inst(inst, entry_block); + } + + // block1 + { + let param0 = ctx.func.dfg.block_params(block1)[0]; + + let const50 = { + // TODO: when taking immediates that are smaller than 64bit we need to call InstructionData::sign_extend_immediates to get them sign_extended to 64bit + let inst = ctx.func.dfg.make_inst(InstructionData::UnaryImm { + opcode: Opcode::Iconst, + imm: 50.into(), + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, block1); + ctx.func.dfg.first_result(inst) + }; + let call_res = { + let mut vlist = ValueList::default(); + { + let pool = &mut ctx.func.dfg.value_lists; + vlist.push(const50, pool); + } + let inst = ctx.func.dfg.make_inst(InstructionData::Call { + opcode: Opcode::Call, + args: vlist, + func_ref: fn_ref, + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, block1); + ctx.func.dfg.first_result(inst) + }; + let add_val = { + let inst = ctx.func.dfg.make_inst(InstructionData::Binary { + opcode: Opcode::Iadd, + args: [param0, call_res], + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, block1); + ctx.func.dfg.first_result(inst) + }; + { + let mut vlist = ValueList::default(); + { + let pool = &mut ctx.func.dfg.value_lists; + vlist.push(add_val, pool); + } + let inst = ctx.func.dfg.make_inst(InstructionData::MultiAry { + opcode: Opcode::Return, + args: vlist, + }); + ctx.func.layout.append_inst(inst, block1); + } + } + + // block2 + { + /* + let test_val = func_builder.ins().iconst(types::I64, 10); + let test_val2 = func_builder.ins().iconst(types::I64, -20); + let test2_val = func_builder.ins().iadd(test_val, test_val2); + let sub_val = func_builder.ins().iadd(param0, test2_val); + func_builder.ins().return_(&[sub_val]); */ + let param0 = ctx.func.dfg.block_params(block2)[0]; + let test_val = { + let inst = ctx.func.dfg.make_inst(InstructionData::UnaryImm { + opcode: Opcode::Iconst, + imm: 10.into(), + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, block2); + ctx.func.dfg.first_result(inst) + }; + let test_val2 = { + let inst = ctx.func.dfg.make_inst(InstructionData::UnaryImm { + opcode: Opcode::Iconst, + imm: (-20 as i64).into(), + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, block2); + ctx.func.dfg.first_result(inst) + }; + /*let test2_val = { + let inst = ctx.func.dfg.make_inst(InstructionData::Binary { + opcode: Opcode::Iadd, + args: [test_val, test_val2], + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, block2); + ctx.func.dfg.first_result(inst) + };*/ + let test2_val = { + let inst = ctx.func.dfg.make_inst(InstructionData::BinaryImm64 { + opcode: Opcode::IaddImm, + arg: test_val, + imm: (-20 as i64).into(), + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, block2); + ctx.func.dfg.first_result(inst) + }; + //let test2_val = tmp_val; + let sub_val = { + let inst = ctx.func.dfg.make_inst(InstructionData::Binary { + opcode: Opcode::Iadd, + args: [param0, test2_val], + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, block2); + ctx.func.dfg.first_result(inst) + }; + { + let mut vlist = ValueList::default(); + { + let pool = &mut ctx.func.dfg.value_lists; + vlist.push(sub_val, pool); + } + let inst = ctx.func.dfg.make_inst(InstructionData::MultiAry { + opcode: Opcode::Return, + args: vlist, + }); + ctx.func.layout.append_inst(inst, block2); + } + } +} + +fn run_test1(code: *const ()) { + let ptr: extern "C" fn(u64, u64) -> u64 = unsafe { std::mem::transmute(code) }; + println!("Res1: {}", (ptr)(10, 0)); + println!("Res2: {}", (ptr)(10, 1)); +}*/ + +/*fn test2(ctx: &mut codegen::Context) { + let entry_block = { + let b = ctx.func.dfg.make_block(); + ctx.func.layout.append_block(b); + ctx.func.dfg.append_block_param(b, types::I64); + ctx.func.dfg.append_block_param(b, types::I64); + b + }; + let param0 = ctx.func.dfg.block_params(entry_block)[0]; + + let c = { + let inst = ctx.func.dfg.make_inst(InstructionData::UnaryImm { + opcode: Opcode::Iconst, + imm: 1.into(), + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, entry_block); + ctx.func.dfg.first_result(inst) + }; + let res = { + let inst = ctx.func.dfg.make_inst(InstructionData::Binary { + opcode: Opcode::Band, + args: [c, param0], + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, entry_block); + ctx.func.dfg.first_result(inst) + }; + /*let nc = { + let inst = ctx.func.dfg.make_inst(InstructionData::Unary { + opcode: Opcode::Bnot, + arg: c, + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, entry_block); + ctx.func.dfg.first_result(inst) + }; + let res = { + let inst = ctx.func.dfg.make_inst(InstructionData::Binary { + opcode: Opcode::Band, + args: [nc, param0], + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, entry_block); + ctx.func.dfg.first_result(inst) + };*/ + { + let mut vlist = ValueList::default(); + { + let pool = &mut ctx.func.dfg.value_lists; + vlist.push(res, pool); + } + let inst = ctx.func.dfg.make_inst(InstructionData::MultiAry { + opcode: Opcode::Return, + args: vlist, + }); + ctx.func.layout.append_inst(inst, entry_block); + } +} + +fn run_test2(code: *const ()) { + let ptr: extern "C" fn(u64, u64) -> u64 = unsafe { std::mem::transmute(code) }; + println!("Res1: {}", (ptr)(3, 1)); +} +*/ + +/*fn test3(ctx: &mut codegen::Context, fn_ref: FuncRef) { + let ty_use = types::I32; + ctx.func.signature.params.push(AbiParam::new(ty_use).uext()); + ctx.func.signature.params.push(AbiParam::new(ty_use)); + ctx.func.signature.returns.push(AbiParam::new(ty_use)); + + let entry_block = { + let b = ctx.func.dfg.make_block(); + ctx.func.layout.append_block(b); + ctx.func.dfg.append_block_param(b, ty_use); + ctx.func.dfg.append_block_param(b, ty_use); + b + }; + let param0 = ctx.func.dfg.block_params(entry_block)[0]; + let param1 = ctx.func.dfg.block_params(entry_block)[1]; + + /*let d128 = { + let inst = ctx.func.dfg.make_inst(InstructionData::UnaryImm { + opcode: Opcode::Iconst, + imm: 0.into(), + }); + ctx.func.dfg.make_inst_results(inst, types::I64); + ctx.func.layout.append_inst(inst, entry_block); + let v = ctx.func.dfg.first_result(inst); + let inst = ctx.func.dfg.make_inst(InstructionData::Unary { + opcode: Opcode::Uextend, + arg: v, + }); + ctx.func.dfg.make_inst_results(inst, types::I128); + ctx.func.layout.append_inst(inst, entry_block); + let v = ctx.func.dfg.first_result(inst); + v + }; + + { + let mut vlist = ValueList::default(); + { + let pool = &mut ctx.func.dfg.value_lists; + vlist.push(param0, pool); + vlist.push(param0, pool); + vlist.push(param0, pool); + vlist.push(param0, pool); + vlist.push(param0, pool); + vlist.push(d128, pool); + } + let inst = ctx.func.dfg.make_inst(InstructionData::Call { + opcode: Opcode::Call, + args: vlist, + func_ref: fn_ref, + }); + ctx.func.layout.append_inst(inst, entry_block); + };*/ + let c = { + let inst = ctx.func.dfg.make_inst(InstructionData::UnaryImm { + opcode: Opcode::Iconst, + imm: 1.into(), + }); + ctx.func.dfg.make_inst_results(inst, ty_use); + ctx.func.layout.append_inst(inst, entry_block); + ctx.func.dfg.first_result(inst) + }; + + let res = { + let inst = ctx.func.dfg.make_inst(InstructionData::Binary { + opcode: Opcode::Iadd, + args: [param0, c], + }); + ctx.func.dfg.make_inst_results(inst, ty_use); + ctx.func.layout.append_inst(inst, entry_block); + ctx.func.dfg.first_result(inst) + }; + + { + let mut vlist = ValueList::default(); + { + let pool = &mut ctx.func.dfg.value_lists; + vlist.push(res, pool); + } + let inst = ctx.func.dfg.make_inst(InstructionData::MultiAry { + opcode: Opcode::Return, + args: vlist, + }); + ctx.func.layout.append_inst(inst, entry_block); + } +}*/ diff --git a/tests/alias.clif b/tests/alias.clif new file mode 100644 index 0000000..58f4386 --- /dev/null +++ b/tests/alias.clif @@ -0,0 +1,19 @@ +function %alias(i8) -> i8 { +block0(v0: i8): + v1 -> v0 + return v1 +} + +function %double_alias(i8) -> i8 { +block0(v0: i8): + v1 -> v0 + v2 -> v1 + return v2 +} + +function %alias_inst() -> i8 { +block0: + v0 = iconst.i8 10 + v1 -> v0 + return v1 +} diff --git a/tests/bad_br.clif b/tests/bad_br.clif new file mode 100644 index 0000000..463c8fb --- /dev/null +++ b/tests/bad_br.clif @@ -0,0 +1,11 @@ +function u0:2(i32) -> i32 system_v { +block0(v0: i32): + v1 = iconst.i32 1 + v2 = iconst.i32 2 + v3 = iconst.i32 3 + v4 = iconst.i32 4 + br_table v0, block1(v4), [block1(v1), block1(v2), block1(v2), block1(v3)] ; v4 = 4, v1 = 1, v2 = 2, v2 = 2, v3 = 3 + +block1(v5: i32): + return v5 +} \ No newline at end of file diff --git a/tests/bad_func_import.clif b/tests/bad_func_import.clif new file mode 100644 index 0000000..fb25bcb --- /dev/null +++ b/tests/bad_func_import.clif @@ -0,0 +1,46 @@ +function u0:4(i64 vmctx, i64, r64, i64) wasmtime_system_v { + gv0 = vmctx + gv1 = load.i64 notrap aligned readonly gv0+8 + gv2 = load.i64 notrap aligned gv1 + gv3 = vmctx + sig0 = (i64 vmctx, i64) wasmtime_system_v + sig1 = (i64 vmctx, i64, i32) -> i32 wasmtime_system_v + sig2 = (i64 vmctx, i64, i32, i64) wasmtime_system_v + sig3 = (i64 vmctx, i64, i32, i64, i32, f32, f64, r64, i64) wasmtime_system_v + fn0 = u0:0 sig0 + fn1 = u0:1 sig1 + fn2 = u0:2 sig2 + fn3 = u0:3 sig3 + stack_limit = gv2 + +block0(v0: i64, v1: i64, v2: r64, v3: i64): + v4 -> v0 + v8 -> v0 + v15 -> v0 + v23 -> v0 + v5 = load.i64 notrap aligned v0+72 + v6 = load.i64 notrap aligned v0+80 + call_indirect sig0, v5(v6, v0) + v9 = load.i64 notrap aligned v0+88 + v10 = load.i64 notrap aligned v0+96 + v7 = iconst.i32 0 + v11 = call_indirect sig1, v9(v10, v0, v7) ; v7 = 0 + v16 = load.i64 notrap aligned v0+104 + v17 = load.i64 notrap aligned v0+112 + v12 = iconst.i32 1 + v13 = iadd v11, v12 ; v12 = 1 + v14 = iconst.i64 3 + call_indirect sig2, v16(v17, v0, v13, v14) ; v14 = 3 + v24 = load.i64 notrap aligned v0+120 + v25 = load.i64 notrap aligned v0+128 + v18 = iconst.i32 100 + v19 = iconst.i64 200 + v20 = iconst.i32 300 + v21 = f32const 0x1.900000p8 + v22 = f64const 0x1.f400000000000p8 + call_indirect sig3, v24(v25, v0, v18, v19, v20, v21, v22, v2, v3) ; v18 = 100, v19 = 200, v20 = 300, v21 = 0x1.900000p8, v22 = 0x1.f400000000000p8 + jump block1 + +block1: + return +} \ No newline at end of file diff --git a/tests/bad_trampoline.clif b/tests/bad_trampoline.clif new file mode 100644 index 0000000..d90726d --- /dev/null +++ b/tests/bad_trampoline.clif @@ -0,0 +1,9 @@ +function u0:3(i64, i64) system_v { + sig0 = (i8) -> i8 system_v + +block0(v0: i64, v1: i64): + v2 = load.i8 notrap aligned v1 + v3 = call_indirect sig0, v0(v2) + store notrap aligned v3, v1 + return +} \ No newline at end of file diff --git a/tests/fibonacci.clif b/tests/fibonacci.clif new file mode 100644 index 0000000..0001cdb --- /dev/null +++ b/tests/fibonacci.clif @@ -0,0 +1,21 @@ +function %fibonacci(i32) -> i32 { +block0(v0: i32): + v1 = icmp_imm ule v0, 2 + v2 = iconst.i32 1 + ; handle base case, n <= 2 + brif v1, block3(v2), block1(v0, v2) + +block1(v4: i32, v5:i32): + v6 = iconst.i32 1 + v7 = iadd_imm v4, -2 + jump block2(v7, v5, v6) + +block2(v10: i32, v11: i32, v12: i32): ; params: n, fib(n-1), fib(n-2) + v13 = iadd v11, v12 + v14 = iadd_imm v10, -1 + v15 = icmp_imm eq v14, 0 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): ; early return and end of loop + return v20 +} \ No newline at end of file diff --git a/tests/simple.clif b/tests/simple.clif new file mode 100644 index 0000000..232b414 --- /dev/null +++ b/tests/simple.clif @@ -0,0 +1,21 @@ +function u0:0(i64, i64) -> i64 system_v { + sig0 = (i64) -> i64 system_v + fn0 = u0:0 sig0 + +block0(v0: i64, v1: i64): + v4 = iconst.i64 50 + brif v1, block1(v0), block2(v0) + +block1(v2: i64): + v5 = iconst.i64 50 + v6 = call fn0(v5) ; v5 = 50 + v7 = iadd v2, v6 + return v7 + +block2(v3: i64): + v8 = iconst.i64 10 + v9 = iconst.i64 -20 + v10 = iadd_imm v8, -20 ; v8 = 10 + v11 = iadd v3, v10 + return v11 +} \ No newline at end of file diff --git a/tests/test.clif b/tests/test.clif new file mode 100644 index 0000000..0228e07 --- /dev/null +++ b/tests/test.clif @@ -0,0 +1,8 @@ +function u0:4(i64, i64) system_v { + sig0 = () -> i8 system_v + +block0(v0: i64, v1: i64): + v2 = call_indirect sig0, v0() + store notrap aligned v2, v1 + return +} \ No newline at end of file diff --git a/tmp_out.txt b/tmp_out.txt new file mode 100644 index 0000000..729371f --- /dev/null +++ b/tmp_out.txt @@ -0,0 +1,2050 @@ + Compiling regalloc2 v0.6.1 (/home/tatsu/projects/regalloc/regalloc2) +warning: unused import: `println` + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:6:29 + | +6 | use std::{convert::TryFrom, println}; + | ^^^^^^^ + | + = note: `#[warn(unused_imports)]` on by default + +warning: unused imports: `Operand`, `cfg::CFGInfo` + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:10:5 + | +10 | cfg::CFGInfo, Allocation, Block, Edit, Function, Inst, MachineEnv, Operand, OperandConstraint, + | ^^^^^^^^^^^^ ^^^^^^^ + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:562:33 + | +561 | ... panic!("reftype has fixed use when its required to be on stack"); + | ---------------------------------------------------------------- any code following this expression is unreachable +562 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + | + = note: `#[warn(unreachable_code)]` on by default + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:570:37 + | +569 | ... panic!("fixed reg late use would overwrite another fixed reg use/early write"); + | ------------------------------------------------------------------------------ any code following this expression is unreachable +570 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:579:37 + | +578 | ... panic!("fixed late use would be clobbered"); + | ------------------------------------------- any code following this expression is unreachable +579 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:593:37 + | +592 | ... panic!("fixed late def would overwrite late use/early def"); + | ----------------------------------------------------------- any code following this expression is unreachable +593 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:601:37 + | +600 | ... panic!("early def shares reg or is clobbered"); + | ---------------------------------------------- any code following this expression is unreachable +601 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:727:33 + | +726 | ... panic!("reftype required to be in reg at safepoint"); + | ---------------------------------------------------- any code following this expression is unreachable +727 | ... return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:753:21 + | +752 | panic!("Out of registers: {:?}", regs_allocated); + | ------------------------------------------------ any code following this expression is unreachable +753 | return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + +warning: unreachable statement + --> /home/tatsu/projects/regalloc/regalloc2/src/ion/fast_alloc.rs:807:21 + | +806 | panic!("out of registers"); + | -------------------------- any code following this expression is unreachable +807 | return Err(RegAllocError::TooManyLiveRegs); + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ unreachable statement + + Compiling cranelift-codegen v0.96.0 (/home/tatsu/projects/regalloc/wasmtime/cranelift/codegen) +warning: `regalloc2` (lib) generated 10 warnings +warning: unused variable: `want_disasm` + --> /home/tatsu/projects/regalloc/wasmtime/cranelift/codegen/src/machinst/vcode.rs:765:9 + | +765 | want_disasm: bool, + | ^^^^^^^^^^^ help: if this is intentional, prefix it with an underscore: `_want_disasm` + | + = note: `#[warn(unused_variables)]` on by default + + Compiling cranelift-module v0.96.0 (/home/tatsu/projects/regalloc/wasmtime/cranelift/module) + Compiling cranelift-native v0.96.0 (/home/tatsu/projects/regalloc/wasmtime/cranelift/native) + Compiling cranelift-frontend v0.96.0 (/home/tatsu/projects/regalloc/wasmtime/cranelift/frontend) + Compiling cranelift-reader v0.96.0 (/home/tatsu/projects/regalloc/wasmtime/cranelift/reader) + Compiling cranelift-jit v0.96.0 (/home/tatsu/projects/regalloc/wasmtime/cranelift/jit) + Compiling cranelift v0.96.0 (/home/tatsu/projects/regalloc/wasmtime/cranelift/umbrella) +warning: `cranelift-codegen` (lib) generated 1 warning + Compiling cranelift_test v0.1.0 (/home/tatsu/projects/regalloc/cranelift_test) +warning: unused imports: `BlockCall`, `FuncRef`, `InstructionData`, `Opcode`, `ValueList`, `function` + --> src/main.rs:1:30 + | +1 | use cranelift::codegen::ir::{function, BlockCall, FuncRef, InstructionData, Opcode, ValueList}; + | ^^^^^^^^ ^^^^^^^^^ ^^^^^^^ ^^^^^^^^^^^^^^^ ^^^^^^ ^^^^^^^^^ + | + = note: `#[warn(unused_imports)]` on by default + +warning: unused import: `cranelift::codegen::isa` + --> src/main.rs:2:5 + | +2 | use cranelift::codegen::isa; + | ^^^^^^^^^^^^^^^^^^^^^^^ + +warning: unused import: `cranelift_frontend::FunctionBuilderContext` + --> src/main.rs:5:5 + | +5 | use cranelift_frontend::FunctionBuilderContext; + | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +warning: unused imports: `DataDescription`, `FuncId` + --> src/main.rs:7:24 + | +7 | use cranelift_module::{DataDescription, FuncId, Linkage, Module}; + | ^^^^^^^^^^^^^^^ ^^^^^^ + +warning: unused import: `cranelift::prelude` + --> src/main.rs:4:5 + | +4 | use cranelift::prelude::*; + | ^^^^^^^^^^^^^^^^^^ + +warning: `cranelift_test` (bin "cranelift_test") generated 5 warnings + Finished dev [unoptimized + debuginfo] target(s) in 5.08s + Running `target/debug/cranelift_test tests/fibonacci.clif` + DEBUG cranelift_codegen::timing > timing: Starting Parsing textual Cranelift IR, (during ) + DEBUG cranelift_codegen::timing > timing: Starting Parsing textual Cranelift IR, (during Parsing textual Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Parsing textual Cranelift IR + DEBUG cranelift_codegen::timing > timing: Ending Parsing textual Cranelift IR + INFO cranelift_jit::backend > defining function funcid0: function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v1 = icmp_imm ule v0, 2 + v2 = iconst.i32 1 + brif v1, block3(v2), block1(v0, v2) ; v2 = 1, v2 = 1 + +block1(v4: i32, v5: i32): + v6 = iconst.i32 1 + v7 = iadd_imm v4, -2 + jump block2(v7, v5, v6) ; v6 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v13 = iadd v11, v12 + v14 = iadd_imm v10, -1 + v15 = icmp_imm eq v14, 0 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + DEBUG cranelift_codegen::timing > timing: Starting Compilation passes, (during ) + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::context > Number of CLIF instructions to optimize: 11 + DEBUG cranelift_codegen::context > Number of CLIF blocks to optimize: 4 + TRACE cranelift_codegen::context > Optimizing (opt level Speed): +function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v1 = icmp_imm ule v0, 2 + v2 = iconst.i32 1 + brif v1, block3(v2), block1(v0, v2) ; v2 = 1, v2 = 1 + +block1(v4: i32, v5: i32): + v6 = iconst.i32 1 + v7 = iadd_imm v4, -2 + jump block2(v7, v5, v6) ; v6 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v13 = iadd v11, v12 + v14 = iadd_imm v10, -1 + v15 = icmp_imm eq v14, 0 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + TRACE cranelift_codegen::legalizer > Pre-legalization function: +function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v1 = icmp_imm ule v0, 2 + v2 = iconst.i32 1 + brif v1, block3(v2), block1(v0, v2) ; v2 = 1, v2 = 1 + +block1(v4: i32, v5: i32): + v6 = iconst.i32 1 + v7 = iadd_imm v4, -2 + jump block2(v7, v5, v6) ; v6 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v13 = iadd v11, v12 + v14 = iadd_imm v10, -1 + v15 = icmp_imm eq v14, 0 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + TRACE cranelift_codegen::legalizer > Post-legalization function: +function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v21 = iconst.i32 2 + v1 = icmp ule v0, v21 ; v21 = 2 + v2 = iconst.i32 1 + brif v1, block3(v2), block1(v0, v2) ; v2 = 1, v2 = 1 + +block1(v4: i32, v5: i32): + v6 = iconst.i32 1 + v22 = iconst.i32 -2 + v7 = iadd v4, v22 ; v22 = -2 + jump block2(v7, v5, v6) ; v6 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v13 = iadd v11, v12 + v23 = iconst.i32 -1 + v14 = iadd v10, v23 ; v23 = -1 + v24 = iconst.i32 0 + v15 = icmp eq v14, v24 ; v24 = 0 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Starting Remove unreachable blocks, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Ending Remove unreachable blocks + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::timing > timing: Starting Dead code elimination, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Ending Dead code elimination + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::timing > timing: Starting Remove constant phi-nodes, (during Compilation passes) + DEBUG cranelift_codegen::remove_constant_phis > do_remove_constant_phis: done, 2 iters. 6 formals, of which 2 const. + DEBUG cranelift_codegen::timing > timing: Ending Remove constant phi-nodes + DEBUG cranelift_codegen::timing > timing: Starting Verify Cranelift IR, (during Compilation passes) + DEBUG cranelift_codegen::timing > timing: Starting Control flow graph, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Control flow graph + DEBUG cranelift_codegen::timing > timing: Starting Dominator tree, (during Verify Cranelift IR) + DEBUG cranelift_codegen::timing > timing: Ending Dominator tree + DEBUG cranelift_codegen::timing > timing: Ending Verify Cranelift IR + DEBUG cranelift_codegen::timing > timing: Starting Egraph based optimizations, (during Compilation passes) + TRACE cranelift_codegen::context > About to optimize with egraph phase: +function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v4 -> v0 + v21 = iconst.i32 2 + v1 = icmp ule v0, v21 ; v21 = 2 + v2 = iconst.i32 1 + v5 -> v2 + brif v1, block3(v2), block1 ; v2 = 1 + +block1: + v6 = iconst.i32 1 + v22 = iconst.i32 -2 + v7 = iadd.i32 v4, v22 ; v22 = -2 + jump block2(v7, v5, v6) ; v5 = 1, v6 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v13 = iadd v11, v12 + v23 = iconst.i32 -1 + v14 = iadd v10, v23 ; v23 = -1 + v24 = iconst.i32 0 + v15 = icmp eq v14, v24 ; v24 = 0 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + DEBUG cranelift_codegen::timing > timing: Starting Loop analysis, (during Egraph based optimizations) + DEBUG cranelift_codegen::timing > timing: Ending Loop analysis + TRACE cranelift_codegen::alias_analysis > alias analysis: input is: +function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v4 -> v0 + v21 = iconst.i32 2 + v1 = icmp ule v0, v21 ; v21 = 2 + v2 = iconst.i32 1 + v5 -> v2 + brif v1, block3(v2), block1 ; v2 = 1 + +block1: + v6 = iconst.i32 1 + v22 = iconst.i32 -2 + v7 = iadd.i32 v4, v22 ; v22 = -2 + jump block2(v7, v5, v6) ; v5 = 1, v6 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v13 = iadd v11, v12 + v23 = iconst.i32 -1 + v14 = iadd v10, v23 ; v23 = -1 + v24 = iconst.i32 0 + v15 = icmp eq v14, v24 ; v24 = 0 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + TRACE cranelift_codegen::alias_analysis > alias analysis: input to block0 is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst11: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst0: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst1: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst2: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > alias analysis: input to block1 is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst3: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst12: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst4: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst5: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > alias analysis: input to block2 is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst6: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst13: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst7: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst14: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst8: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst9: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > alias analysis: input to block3 is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::alias_analysis > after inst10: state is LastStores { heap: None, table: None, vmctx: None, other: None } + TRACE cranelift_codegen::egraph > Processing block block0 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for blockparam v0 + TRACE cranelift_codegen::egraph > Processing inst inst11 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v21 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v21 + TRACE cranelift_codegen::opts > iter: value v21 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v21 + TRACE cranelift_codegen::egraph > Returned from ISLE for v21, got v21 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst0 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v1 + TRACE cranelift_codegen::egraph > rewriting arg v0 of inst inst0 to v0 + TRACE cranelift_codegen::egraph > rewriting arg v21 of inst inst0 to v21 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v1 + TRACE cranelift_codegen::opts > iter: value v1 + TRACE cranelift_codegen::opts > -> value of type i8 + TRACE cranelift_codegen::opts > iter: value v21 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v25 + TRACE cranelift_codegen::opts > iter: value v25 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v25 + TRACE cranelift_codegen::egraph > Returned from ISLE for v25, got v25 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::opts > make_inst_ctor: UnaryImm { opcode: Iconst, imm: Imm64(3) } -> v25 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v26 + TRACE cranelift_codegen::opts > iter: value v26 + TRACE cranelift_codegen::opts > -> value of type i8 + TRACE cranelift_codegen::opts > iter: value v25 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > iter: value v0 + TRACE cranelift_codegen::opts > make_inst_ctor: IntCompare { opcode: Icmp, args: [v0, v25], cond: UnsignedLessThan } -> v26 + TRACE cranelift_codegen::opts > iter: value v0 + TRACE cranelift_codegen::egraph > Returned from ISLE for v1, got v26 + TRACE cranelift_codegen::egraph > -> union: now v27 + TRACE cranelift_codegen::unionfind > union: v1, v26 + TRACE cranelift_codegen::unionfind > union: v1, v27 + TRACE cranelift_codegen::egraph > Processing inst inst1 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v2 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v2 + TRACE cranelift_codegen::opts > iter: value v2 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v2 + TRACE cranelift_codegen::egraph > Returned from ISLE for v2, got v2 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst2 + TRACE cranelift_codegen::egraph > rewriting arg v1 of inst inst2 to v27 + TRACE cranelift_codegen::egraph > rewriting arg v2 of inst inst2 to v2 + TRACE cranelift_codegen::alias_analysis > alias analysis: scanning at inst2 with state LastStores { heap: None, table: None, vmctx: None, other: None } (Brif { opcode: Brif, arg: v27, blocks: [BlockCall { values: EntityList { index: 13, unused: PhantomData } }, BlockCall { values: EntityList { index: 21, unused: PhantomData } }] }) + TRACE cranelift_codegen::egraph > Processing block block1 + TRACE cranelift_codegen::egraph > Processing inst inst3 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v6 + TRACE cranelift_codegen::unionfind > union: v2, v6 + TRACE cranelift_codegen::egraph > Processing inst inst12 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v22 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v22 + TRACE cranelift_codegen::opts > iter: value v22 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v22 + TRACE cranelift_codegen::egraph > Returned from ISLE for v22, got v22 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst4 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v7 + TRACE cranelift_codegen::egraph > rewriting arg v0 of inst inst4 to v0 + TRACE cranelift_codegen::egraph > rewriting arg v22 of inst inst4 to v22 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v7 + TRACE cranelift_codegen::opts > iter: value v7 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > iter: value v0 + TRACE cranelift_codegen::opts > iter: value v22 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v7 + TRACE cranelift_codegen::egraph > Returned from ISLE for v7, got v7 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst5 + TRACE cranelift_codegen::egraph > rewriting arg v7 of inst inst5 to v7 + TRACE cranelift_codegen::egraph > rewriting arg v2 of inst inst5 to v2 + TRACE cranelift_codegen::egraph > rewriting arg v6 of inst inst5 to v2 + TRACE cranelift_codegen::alias_analysis > alias analysis: scanning at inst5 with state LastStores { heap: None, table: None, vmctx: None, other: None } (Jump { opcode: Jump, destination: BlockCall { values: EntityList { index: 37, unused: PhantomData } } }) + TRACE cranelift_codegen::egraph > Processing block block2 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for blockparam v10 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for blockparam v11 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for blockparam v12 + TRACE cranelift_codegen::egraph > Processing inst inst6 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v13 + TRACE cranelift_codegen::egraph > rewriting arg v11 of inst inst6 to v11 + TRACE cranelift_codegen::egraph > rewriting arg v12 of inst inst6 to v12 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v13 + TRACE cranelift_codegen::opts > iter: value v13 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > iter: value v11 + TRACE cranelift_codegen::opts > iter: value v12 + TRACE cranelift_codegen::egraph > Processing inst inst13 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v23 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v23 + TRACE cranelift_codegen::opts > iter: value v23 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v23 + TRACE cranelift_codegen::egraph > Returned from ISLE for v23, got v23 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst7 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v14 + TRACE cranelift_codegen::egraph > rewriting arg v10 of inst inst7 to v10 + TRACE cranelift_codegen::egraph > rewriting arg v23 of inst inst7 to v23 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v14 + TRACE cranelift_codegen::opts > iter: value v14 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > iter: value v10 + TRACE cranelift_codegen::opts > iter: value v23 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v14 + TRACE cranelift_codegen::egraph > Returned from ISLE for v14, got v14 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst14 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v24 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v24 + TRACE cranelift_codegen::opts > iter: value v24 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > remat: v24 + TRACE cranelift_codegen::egraph > Returned from ISLE for v24, got v24 + TRACE cranelift_codegen::egraph > -> same as orig value; skipping + TRACE cranelift_codegen::egraph > Processing inst inst8 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for v15 + TRACE cranelift_codegen::egraph > rewriting arg v14 of inst inst8 to v14 + TRACE cranelift_codegen::egraph > rewriting arg v24 of inst inst8 to v24 + TRACE cranelift_codegen::egraph > Calling into ISLE with original value v15 + TRACE cranelift_codegen::opts > iter: value v15 + TRACE cranelift_codegen::opts > -> value of type i8 + TRACE cranelift_codegen::opts > iter: value v14 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::opts > iter: value v14 + TRACE cranelift_codegen::opts > -> value of type i32 + TRACE cranelift_codegen::egraph > Processing inst inst9 + TRACE cranelift_codegen::egraph > rewriting arg v15 of inst inst9 to v15 + TRACE cranelift_codegen::egraph > rewriting arg v13 of inst inst9 to v13 + TRACE cranelift_codegen::egraph > rewriting arg v14 of inst inst9 to v14 + TRACE cranelift_codegen::egraph > rewriting arg v13 of inst inst9 to v13 + TRACE cranelift_codegen::egraph > rewriting arg v11 of inst inst9 to v11 + TRACE cranelift_codegen::alias_analysis > alias analysis: scanning at inst9 with state LastStores { heap: None, table: None, vmctx: None, other: None } (Brif { opcode: Brif, arg: v15, blocks: [BlockCall { values: EntityList { index: 57, unused: PhantomData } }, BlockCall { values: EntityList { index: 65, unused: PhantomData } }] }) + TRACE cranelift_codegen::egraph > Processing block block3 + TRACE cranelift_codegen::egraph > creating initial singleton eclass for blockparam v20 + TRACE cranelift_codegen::egraph > Processing inst inst10 + TRACE cranelift_codegen::egraph > rewriting arg v20 of inst inst10 to v20 + TRACE cranelift_codegen::alias_analysis > alias analysis: scanning at inst10 with state LastStores { heap: None, table: None, vmctx: None, other: None } (MultiAry { opcode: Return, args: EntityList { index: 73, unused: PhantomData } }) + TRACE cranelift_codegen::egraph > egraph built: +function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v4 -> v0 + brif.i8 v27, block3(v2), block1 ; v2 = 1 + +block1: + jump block2(v7, v2, v2) ; v2 = 1, v2 = 1 + +block2(v10: i32, v11: i32, v12: i32): + brif.i8 v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + + TRACE cranelift_codegen::egraph > -> v0 = Param(block0, 0) + TRACE cranelift_codegen::egraph > -> v1 = Result(inst0, 0) + TRACE cranelift_codegen::egraph > -> inst0 = IntCompare { opcode: Icmp, args: [v0, v21], cond: UnsignedLessThanOrEqual } + TRACE cranelift_codegen::egraph > -> v2 = Result(inst1, 0) + TRACE cranelift_codegen::egraph > -> inst1 = UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::egraph > -> v4 = Param(block0, 0) + TRACE cranelift_codegen::egraph > -> v5 = Result(inst1, 0) + TRACE cranelift_codegen::egraph > -> inst1 = UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::egraph > -> v6 = Result(inst3, 0) + TRACE cranelift_codegen::egraph > -> inst3 = UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::egraph > -> v7 = Result(inst4, 0) + TRACE cranelift_codegen::egraph > -> inst4 = Binary { opcode: Iadd, args: [v0, v22] } + TRACE cranelift_codegen::egraph > -> v10 = Param(block2, 0) + TRACE cranelift_codegen::egraph > -> v11 = Param(block2, 1) + TRACE cranelift_codegen::egraph > -> v12 = Param(block2, 2) + TRACE cranelift_codegen::egraph > -> v13 = Result(inst6, 0) + TRACE cranelift_codegen::egraph > -> inst6 = Binary { opcode: Iadd, args: [v11, v12] } + TRACE cranelift_codegen::egraph > -> v14 = Result(inst7, 0) + TRACE cranelift_codegen::egraph > -> inst7 = Binary { opcode: Iadd, args: [v10, v23] } + TRACE cranelift_codegen::egraph > -> v15 = Result(inst8, 0) + TRACE cranelift_codegen::egraph > -> inst8 = IntCompare { opcode: Icmp, args: [v14, v24], cond: Equal } + TRACE cranelift_codegen::egraph > -> v20 = Param(block3, 0) + TRACE cranelift_codegen::egraph > -> v21 = Result(inst11, 0) + TRACE cranelift_codegen::egraph > -> inst11 = UnaryImm { opcode: Iconst, imm: Imm64(2) } + TRACE cranelift_codegen::egraph > -> v22 = Result(inst12, 0) + TRACE cranelift_codegen::egraph > -> inst12 = UnaryImm { opcode: Iconst, imm: Imm64(-2) } + TRACE cranelift_codegen::egraph > -> v23 = Result(inst13, 0) + TRACE cranelift_codegen::egraph > -> inst13 = UnaryImm { opcode: Iconst, imm: Imm64(-1) } + TRACE cranelift_codegen::egraph > -> v24 = Result(inst14, 0) + TRACE cranelift_codegen::egraph > -> inst14 = UnaryImm { opcode: Iconst, imm: Imm64(0) } + TRACE cranelift_codegen::egraph > -> v25 = Result(inst15, 0) + TRACE cranelift_codegen::egraph > -> inst15 = UnaryImm { opcode: Iconst, imm: Imm64(3) } + TRACE cranelift_codegen::egraph > -> v26 = Result(inst16, 0) + TRACE cranelift_codegen::egraph > -> inst16 = IntCompare { opcode: Icmp, args: [v0, v25], cond: UnsignedLessThan } + TRACE cranelift_codegen::egraph > -> v27 = Result(inst16, 0) + TRACE cranelift_codegen::egraph > -> inst16 = IntCompare { opcode: Icmp, args: [v0, v25], cond: UnsignedLessThan } + TRACE cranelift_codegen::egraph > stats: Stats { pure_inst: 13, pure_inst_deduped: 1, skeleton_inst: 4, alias_analysis_removed: 0, new_inst: 2, union: 2, subsume: 0, remat: 8, rewrite_rule_invoked: 12, rewrite_depth_limit: 0, elaborate_visit_node: 0, elaborate_memoize_hit: 0, elaborate_memoize_miss: 0, elaborate_memoize_miss_remat: 0, elaborate_licm_hoist: 0, elaborate_func: 0, elaborate_func_pre_insts: 0, elaborate_func_post_insts: 0 } + TRACE cranelift_codegen::egraph::elaborate > computing best for value v0 def Param(block0, 0) + TRACE cranelift_codegen::egraph::elaborate > best for eclass v0: (Cost(0), v0) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v1 def Result(inst0, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v1: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v1: (Cost(4294967294), v1) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v2 def Result(inst1, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v2: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v2: (Cost(0), v2) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v4 def Param(block0, 0) + TRACE cranelift_codegen::egraph::elaborate > best for eclass v4: (Cost(0), v4) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v5 def Result(inst1, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v5: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v5: (Cost(0), v5) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v6 def Result(inst3, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v6: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v6: (Cost(0), v6) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v7 def Result(inst4, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v7: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v7: (Cost(4294967294), v7) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v10 def Param(block2, 0) + TRACE cranelift_codegen::egraph::elaborate > best for eclass v10: (Cost(0), v10) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v11 def Param(block2, 1) + TRACE cranelift_codegen::egraph::elaborate > best for eclass v11: (Cost(0), v11) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v12 def Param(block2, 2) + TRACE cranelift_codegen::egraph::elaborate > best for eclass v12: (Cost(0), v12) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v13 def Result(inst6, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v13: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v13: (Cost(2), v13) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v14 def Result(inst7, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v14: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v14: (Cost(4294967294), v14) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v15 def Result(inst8, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v15: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v15: (Cost(4294967294), v15) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v20 def Param(block3, 0) + TRACE cranelift_codegen::egraph::elaborate > best for eclass v20: (Cost(0), v20) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v21 def Result(inst11, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v21: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v21: (Cost(0), v21) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v22 def Result(inst12, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v22: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v22: (Cost(0), v22) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v23 def Result(inst13, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v23: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v23: (Cost(0), v23) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v24 def Result(inst14, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v24: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v24: (Cost(0), v24) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v25 def Result(inst15, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v25: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v25: (Cost(0), v25) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v26 def Result(inst16, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v26: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v26: (Cost(3), v26) + TRACE cranelift_codegen::egraph::elaborate > computing best for value v27 def Result(inst16, 0) + TRACE cranelift_codegen::egraph::elaborate > -> value v27: result, computing cost + TRACE cranelift_codegen::egraph::elaborate > best for eclass v27: (Cost(3), v27) + TRACE cranelift_codegen::egraph::elaborate > elaborate_block: block block0 + TRACE cranelift_codegen::egraph::elaborate > start_block: block block0 with idom None at loop depth 0 scope depth 1 + TRACE cranelift_codegen::egraph::elaborate > block block0: loop stack is [] + TRACE cranelift_codegen::egraph::elaborate > elaborating inst inst2 with results [] + TRACE cranelift_codegen::egraph::elaborate > -> inserting before inst2 + TRACE cranelift_codegen::egraph::elaborate > -> arg v27 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v26 canonical v1 before inst2 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v26 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v26 -> best v26 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v26 is result 0 of inst16 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst IntCompare { opcode: Icmp, args: [v0, v25], cond: UnsignedLessThan } + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v0 canonical v0 before inst2 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v0 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v0 -> best v0 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v0 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v25 canonical v25 before inst2 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v25 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v25 -> best v25 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v25 is result 0 of inst15 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(3) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst15 result 0 args 0 remat true before inst2 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst2 insert_block block0 + TRACE cranelift_codegen::egraph::elaborate > need inst inst15 before inst2 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v25 + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst16 result 0 args 2 remat false before inst2 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block0, value: v0 } hoist level 0 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block0, value: v25 } hoist level 0 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst2 insert_block block0 + TRACE cranelift_codegen::egraph::elaborate > need inst inst16 before inst2 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v26 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block0, value: v26 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 canonical v2 before inst2 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 -> best v2 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v2 is result 0 of inst1 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst1 result 0 args 0 remat true before inst2 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst2 insert_block block0 + TRACE cranelift_codegen::egraph::elaborate > need inst inst1 before inst2 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v2 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block0, value: v2 } + TRACE cranelift_codegen::egraph::elaborate > elaborate_block: block block3 + TRACE cranelift_codegen::egraph::elaborate > start_block: block block3 with idom Some(block0) at loop depth 0 scope depth 2 + TRACE cranelift_codegen::egraph::elaborate > block block3: loop stack is [] + TRACE cranelift_codegen::egraph::elaborate > elaborating inst inst10 with results [] + TRACE cranelift_codegen::egraph::elaborate > -> inserting before inst10 + TRACE cranelift_codegen::egraph::elaborate > -> arg v20 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v20 canonical v20 before inst10 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v20 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v20 -> best v20 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v20 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block3, value: v20 } + TRACE cranelift_codegen::egraph::elaborate > elaborate_block: block block1 + TRACE cranelift_codegen::egraph::elaborate > start_block: block block1 with idom Some(block0) at loop depth 0 scope depth 2 + TRACE cranelift_codegen::egraph::elaborate > block block1: loop stack is [] + TRACE cranelift_codegen::egraph::elaborate > elaborating inst inst5 with results [] + TRACE cranelift_codegen::egraph::elaborate > -> inserting before inst5 + TRACE cranelift_codegen::egraph::elaborate > -> arg v7 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v7 canonical v7 before inst5 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v7 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v7 -> best v7 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v7 is result 0 of inst4 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst Binary { opcode: Iadd, args: [v0, v22] } + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v0 canonical v0 before inst5 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v0 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v0 -> best v0 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v0 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v22 canonical v22 before inst5 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v22 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v22 -> best v22 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v22 is result 0 of inst12 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(-2) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst12 result 0 args 0 remat true before inst5 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst5 insert_block block1 + TRACE cranelift_codegen::egraph::elaborate > need inst inst12 before inst5 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v22 + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst4 result 0 args 2 remat true before inst5 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block0, value: v0 } hoist level 0 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block1, value: v22 } hoist level 0 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst5 insert_block block1 + TRACE cranelift_codegen::egraph::elaborate > need inst inst4 before inst5 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v7 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block1, value: v7 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 canonical v2 before inst5 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 -> best v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 -> remat + TRACE cranelift_codegen::egraph::elaborate > -> value v2 is result 0 of inst1 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst1 result 0 args 0 remat true before inst5 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 0, loop_stack: [] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst5 insert_block block1 + TRACE cranelift_codegen::egraph::elaborate > need inst inst1 before inst5 + TRACE cranelift_codegen::egraph::elaborate > -> inst inst1 already has a location; cloned to inst17 + TRACE cranelift_codegen::unionfind > union: v2, v28 + TRACE cranelift_codegen::egraph::elaborate > -> cloned inst has new result v28 for orig v2 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block1, value: v28 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 canonical v2 before inst5 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 -> best v2 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v2 -> ElaboratedValue { in_block: block1, value: v28 } + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block1, value: v28 } + TRACE cranelift_codegen::egraph::elaborate > elaborate_block: block block2 + TRACE cranelift_codegen::egraph::elaborate > start_block: block block2 with idom Some(block1) at loop depth 0 scope depth 3 + TRACE cranelift_codegen::egraph::elaborate > -> loop header, pushing; depth now 1 + TRACE cranelift_codegen::egraph::elaborate > block block2: loop stack is [LoopStackEntry { lp: loop0, hoist_block: block1, scope_depth: 2 }] + TRACE cranelift_codegen::egraph::elaborate > elaborating inst inst9 with results [] + TRACE cranelift_codegen::egraph::elaborate > -> inserting before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> arg v15 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v15 canonical v15 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v15 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v15 -> best v15 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v15 is result 0 of inst8 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst IntCompare { opcode: Icmp, args: [v14, v24], cond: Equal } + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v14 canonical v14 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v14 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v14 -> best v14 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v14 is result 0 of inst7 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst Binary { opcode: Iadd, args: [v10, v23] } + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v10 canonical v10 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v10 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v10 -> best v10 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v10 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v23 canonical v23 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v23 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v23 -> best v23 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v23 is result 0 of inst13 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(-1) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst13 result 0 args 0 remat true before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 1, loop_stack: [LoopStackEntry { lp: loop0, hoist_block: block1, scope_depth: 2 }] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst9 insert_block block2 + TRACE cranelift_codegen::egraph::elaborate > need inst inst13 before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v23 + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst7 result 0 args 2 remat true before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block2, value: v10 } hoist level 1 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block2, value: v23 } hoist level 1 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 1; cur loop depth: 1, loop_stack: [LoopStackEntry { lp: loop0, hoist_block: block1, scope_depth: 2 }] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst9 insert_block block2 + TRACE cranelift_codegen::egraph::elaborate > need inst inst7 before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v14 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v24 canonical v24 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v24 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v24 -> best v24 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = true + TRACE cranelift_codegen::egraph::elaborate > -> value v24 is result 0 of inst14 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst UnaryImm { opcode: Iconst, imm: Imm64(0) } + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst14 result 0 args 0 remat true before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 0; cur loop depth: 1, loop_stack: [LoopStackEntry { lp: loop0, hoist_block: block1, scope_depth: 2 }] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst9 insert_block block2 + TRACE cranelift_codegen::egraph::elaborate > need inst inst14 before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v24 + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst8 result 0 args 2 remat false before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block2, value: v14 } hoist level 1 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block2, value: v24 } hoist level 1 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 1; cur loop depth: 1, loop_stack: [LoopStackEntry { lp: loop0, hoist_block: block1, scope_depth: 2 }] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst9 insert_block block2 + TRACE cranelift_codegen::egraph::elaborate > need inst inst8 before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v15 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block2, value: v15 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v13 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v13 canonical v13 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v13 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v13 -> best v13 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v13 is result 0 of inst6 + TRACE cranelift_codegen::egraph::elaborate > -> result 0 of inst Binary { opcode: Iadd, args: [v11, v12] } + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v11 canonical v11 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v11 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v11 -> best v11 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v11 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v12 canonical v12 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v12 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v12 -> best v12 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v12 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > PendingInst: inst6 result 0 args 2 remat false before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block2, value: v11 } hoist level 1 + TRACE cranelift_codegen::egraph::elaborate > -> arg: elab_value ElaboratedValue { in_block: block2, value: v12 } hoist level 1 + TRACE cranelift_codegen::egraph::elaborate > -> loop hoist level: 1; cur loop depth: 1, loop_stack: [LoopStackEntry { lp: loop0, hoist_block: block1, scope_depth: 2 }] + TRACE cranelift_codegen::egraph::elaborate > -> decided to place: before inst9 insert_block block2 + TRACE cranelift_codegen::egraph::elaborate > need inst inst6 before inst9 + TRACE cranelift_codegen::egraph::elaborate > -> no location; using original inst + TRACE cranelift_codegen::egraph::elaborate > -> inserting identity mapping for v13 + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block2, value: v13 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v14 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v14 canonical v14 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v14 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v14 -> best v14 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v14 -> ElaboratedValue { in_block: block2, value: v14 } + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block2, value: v14 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v13 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v13 canonical v13 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v13 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v13 -> best v13 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v13 -> ElaboratedValue { in_block: block2, value: v13 } + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block2, value: v13 } + TRACE cranelift_codegen::egraph::elaborate > -> arg v11 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v11 canonical v11 before inst9 + TRACE cranelift_codegen::egraph::elaborate > looking up best value for v11 + TRACE cranelift_codegen::egraph::elaborate > elaborate: value v11 -> best v11 + TRACE cranelift_codegen::egraph::elaborate > -> not present in map; remat = false + TRACE cranelift_codegen::egraph::elaborate > -> value v11 is a blockparam + TRACE cranelift_codegen::egraph::elaborate > -> rewrote arg to ElaboratedValue { in_block: block2, value: v11 } + DEBUG cranelift_codegen::context > egraph stats: Stats { pure_inst: 13, pure_inst_deduped: 1, skeleton_inst: 4, alias_analysis_removed: 0, new_inst: 2, union: 2, subsume: 0, remat: 8, rewrite_rule_invoked: 12, rewrite_depth_limit: 0, elaborate_visit_node: 21, elaborate_memoize_hit: 3, elaborate_memoize_miss: 18, elaborate_memoize_miss_remat: 1, elaborate_licm_hoist: 0, elaborate_func: 1, elaborate_func_pre_insts: 17, elaborate_func_post_insts: 18 } + TRACE cranelift_codegen::context > After egraph optimization: +function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v4 -> v0 + v25 = iconst.i32 3 + v26 = icmp ult v0, v25 ; v25 = 3 + v27 -> v26 + v2 = iconst.i32 1 + v5 -> v2 + brif v26, block3(v2), block1 ; v2 = 1 + +block1: + v22 = iconst.i32 -2 + v7 = iadd.i32 v0, v22 ; v22 = -2 + v28 = iconst.i32 1 + jump block2(v7, v28, v28) ; v28 = 1, v28 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v23 = iconst.i32 -1 + v14 = iadd v10, v23 ; v23 = -1 + v24 = iconst.i32 0 + v15 = icmp eq v14, v24 ; v24 = 0 + v13 = iadd v11, v12 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + DEBUG cranelift_codegen::timing > timing: Ending Egraph based optimizations + TRACE cranelift_codegen::machinst::abi > ABISig: sig Signature { params: [AbiParam { value_type: types::I32, purpose: Normal, extension: None }], returns: [AbiParam { value_type: types::I32, purpose: Normal, extension: None }], call_conv: Fast } => args end = 2 rets end = 1 + arg stack = 0 ret stack = 0 stack_ret_arg = false + TRACE cranelift_codegen::machinst::abi > ABI: func signature Signature { params: [AbiParam { value_type: types::I32, purpose: Normal, extension: None }], returns: [AbiParam { value_type: types::I32, purpose: Normal, extension: None }], call_conv: Fast } + TRACE cranelift_codegen::machinst::blockorder > BlockLoweringOrder: function body function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v4 -> v0 + v25 = iconst.i32 3 + v26 = icmp ult v0, v25 ; v25 = 3 + v27 -> v26 + v2 = iconst.i32 1 + v5 -> v2 + brif v26, block3(v2), block1 ; v2 = 1 + +block1: + v22 = iconst.i32 -2 + v7 = iadd.i32 v0, v22 ; v22 = -2 + v28 = iconst.i32 1 + jump block2(v7, v28, v28) ; v28 = 1, v28 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v23 = iconst.i32 -1 + v14 = iadd v10, v23 ; v23 = -1 + v24 = iconst.i32 0 + v15 = icmp eq v14, v24 ; v24 = 0 + v13 = iadd v11, v12 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + TRACE cranelift_codegen::machinst::blockorder > BlockLoweringOrder: BlockLoweringOrder { + lowered_order: [ + Orig { + block: block0, + }, + CriticalEdge { + pred: block0, + succ: block3, + succ_idx: 0, + }, + Orig { + block: block1, + }, + Orig { + block: block2, + }, + CriticalEdge { + pred: block2, + succ: block3, + succ_idx: 0, + }, + CriticalEdge { + pred: block2, + succ: block2, + succ_idx: 1, + }, + Orig { + block: block3, + }, + ], + lowered_succ_indices: [ + Block( + 1, + ), + Block( + 2, + ), + Block( + 6, + ), + Block( + 3, + ), + Block( + 4, + ), + Block( + 5, + ), + Block( + 6, + ), + Block( + 3, + ), + ], + lowered_succ_ranges: [ + ( + Some( + inst2, + ), + 0..2, + ), + ( + None, + 2..3, + ), + ( + Some( + inst5, + ), + 3..4, + ), + ( + Some( + inst9, + ), + 4..6, + ), + ( + None, + 6..7, + ), + ( + None, + 7..8, + ), + ( + None, + 8..8, + ), + ], + cold_blocks: {}, + indirect_branch_targets: {}, +} + TRACE cranelift_codegen::machinst::lower > bb block0 param v0: regs ValueRegs { parts: [v128, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst15 (UnaryImm { opcode: Iconst, imm: Imm64(3) }): result v25 regs ValueRegs { parts: [v129, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst16 (IntCompare { opcode: Icmp, args: [v0, v25], cond: UnsignedLessThan }): result v26 regs ValueRegs { parts: [v130, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst1 (UnaryImm { opcode: Iconst, imm: Imm64(1) }): result v2 regs ValueRegs { parts: [v131, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block1 inst inst12 (UnaryImm { opcode: Iconst, imm: Imm64(-2) }): result v22 regs ValueRegs { parts: [v132, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block1 inst inst4 (Binary { opcode: Iadd, args: [v0, v22] }): result v7 regs ValueRegs { parts: [v133, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block1 inst inst17 (UnaryImm { opcode: Iconst, imm: Imm64(1) }): result v28 regs ValueRegs { parts: [v134, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block2 param v10: regs ValueRegs { parts: [v135, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block2 param v11: regs ValueRegs { parts: [v136, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block2 param v12: regs ValueRegs { parts: [v137, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst13 (UnaryImm { opcode: Iconst, imm: Imm64(-1) }): result v23 regs ValueRegs { parts: [v138, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst7 (Binary { opcode: Iadd, args: [v10, v23] }): result v14 regs ValueRegs { parts: [v139, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst14 (UnaryImm { opcode: Iconst, imm: Imm64(0) }): result v24 regs ValueRegs { parts: [v140, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst8 (IntCompare { opcode: Icmp, args: [v14, v24], cond: Equal }): result v15 regs ValueRegs { parts: [v141, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst6 (Binary { opcode: Iadd, args: [v11, v12] }): result v13 regs ValueRegs { parts: [v142, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block3 param v20: regs ValueRegs { parts: [v143, v2097151] } + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst15 has color 1 + TRACE cranelift_codegen::machinst::lower > -> constant: 3 + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst16 has color 1 + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst1 has color 1 + TRACE cranelift_codegen::machinst::lower > -> constant: 1 + TRACE cranelift_codegen::machinst::lower > bb block0 inst inst2 has color 1 + TRACE cranelift_codegen::machinst::lower > -> side-effecting; incrementing color for next inst + TRACE cranelift_codegen::machinst::lower > bb block1 inst inst12 has color 3 + TRACE cranelift_codegen::machinst::lower > -> constant: 18446744073709551614 + TRACE cranelift_codegen::machinst::lower > bb block1 inst inst4 has color 3 + TRACE cranelift_codegen::machinst::lower > bb block1 inst inst17 has color 3 + TRACE cranelift_codegen::machinst::lower > -> constant: 1 + TRACE cranelift_codegen::machinst::lower > bb block1 inst inst5 has color 3 + TRACE cranelift_codegen::machinst::lower > -> side-effecting; incrementing color for next inst + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst13 has color 5 + TRACE cranelift_codegen::machinst::lower > -> constant: 18446744073709551615 + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst7 has color 5 + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst14 has color 5 + TRACE cranelift_codegen::machinst::lower > -> constant: 0 + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst8 has color 5 + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst6 has color 5 + TRACE cranelift_codegen::machinst::lower > bb block2 inst inst9 has color 5 + TRACE cranelift_codegen::machinst::lower > -> side-effecting; incrementing color for next inst + TRACE cranelift_codegen::machinst::lower > bb block3 inst inst10 has color 7 + TRACE cranelift_codegen::machinst::lower > -> side-effecting; incrementing color for next inst + TRACE cranelift_codegen::machinst::lower > arg v0 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v25 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v26 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v2 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v0 used, old state Once, new Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v0 onto stack + TRACE cranelift_codegen::machinst::lower > arg v22 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v7 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v28 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v28 used, old state Once, new Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v28 onto stack + TRACE cranelift_codegen::machinst::lower > arg v10 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v23 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v14 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v24 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v11 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v12 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v15 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v13 used, old state Unused, new Once + TRACE cranelift_codegen::machinst::lower > arg v14 used, old state Once, new Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v14 onto stack + TRACE cranelift_codegen::machinst::lower > -> DFS reaches v10 + TRACE cranelift_codegen::machinst::lower > -> became Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v10 onto stack + TRACE cranelift_codegen::machinst::lower > -> DFS reaches v23 + TRACE cranelift_codegen::machinst::lower > -> became Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v23 onto stack + TRACE cranelift_codegen::machinst::lower > arg v13 used, old state Once, new Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v13 onto stack + TRACE cranelift_codegen::machinst::lower > -> DFS reaches v11 + TRACE cranelift_codegen::machinst::lower > -> became Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v11 onto stack + TRACE cranelift_codegen::machinst::lower > -> DFS reaches v12 + TRACE cranelift_codegen::machinst::lower > -> became Multiple + TRACE cranelift_codegen::machinst::lower > -> pushing args for v12 onto stack + TRACE cranelift_codegen::machinst::lower > arg v11 used, old state Multiple, new Multiple + TRACE cranelift_codegen::machinst::lower > arg v20 used, old state Unused, new Once + DEBUG cranelift_codegen::machinst::compile > Number of CLIF instructions to lower: 18 + DEBUG cranelift_codegen::machinst::compile > Number of CLIF blocks to lower: 4 + DEBUG cranelift_codegen::timing > timing: Starting VCode lowering, (during Compilation passes) + TRACE cranelift_codegen::machinst::lower > about to lower function: function %fibonacci(i32) -> i32 fast { +block0(v0: i32): + v4 -> v0 + v25 = iconst.i32 3 + v26 = icmp ult v0, v25 ; v25 = 3 + v27 -> v26 + v2 = iconst.i32 1 + v5 -> v2 + brif v26, block3(v2), block1 ; v2 = 1 + +block1: + v22 = iconst.i32 -2 + v7 = iadd.i32 v0, v22 ; v22 = -2 + v28 = iconst.i32 1 + jump block2(v7, v28, v28) ; v28 = 1, v28 = 1 + +block2(v10: i32, v11: i32, v12: i32): + v23 = iconst.i32 -1 + v14 = iadd v10, v23 ; v23 = -1 + v24 = iconst.i32 0 + v15 = icmp eq v14, v24 ; v24 = 0 + v13 = iadd v11, v12 + brif v15, block3(v13), block2(v14, v13, v11) + +block3(v20: i32): + return v20 +} + + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block3 inst inst10 (MultiAry { opcode: Return, args: EntityList { index: 73, unused: PhantomData } }) is_branch false side_effect true value_needed false + TRACE cranelift_codegen::machinst::lower > lowering: inst inst10: MultiAry { opcode: Return, args: EntityList { index: 73, unused: PhantomData } } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v20 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v143, v2097151] } + TRACE cranelift_codegen::machinst::lower > emit: ret %v143=%rax + TRACE cranelift_codegen::machinst::lower > emit: jmp label3 + TRACE cranelift_codegen::machinst::lower > emit: jmp label6 + TRACE cranelift_codegen::machinst::lower > lower_clif_branches: block block2 branch inst9 targets [MachLabel(4), MachLabel(5)] + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v14 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v139, v2097151] } + TRACE cranelift_codegen::machinst::lower > emit: testl %v139l, %v139l + TRACE cranelift_codegen::machinst::lower > emit: jz label4; j label5 + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v13 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v142, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v14 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v139, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v13 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v142, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v11 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v136, v2097151] } + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block2 inst inst9 (Brif { opcode: Brif, arg: v15, blocks: [BlockCall { values: EntityList { index: 57, unused: PhantomData } }, BlockCall { values: EntityList { index: 65, unused: PhantomData } }] }) is_branch true side_effect true value_needed false + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block2 inst inst6 (Binary { opcode: Iadd, args: [v11, v12] }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst6: Binary { opcode: Iadd, args: [v11, v12] } + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v11 at cur_inst Some(inst6) cur_scan_entry_color Some(InstColor(5)) + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v12 at cur_inst Some(inst6) cur_scan_entry_color Some(InstColor(5)) + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v11 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v136, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v12 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v137, v2097151] } + TRACE cranelift_codegen::machinst::lower > emit: lea 0(%v136,%v137,1), %v148l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v142 to v148 + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block2 inst inst8 (IntCompare { opcode: Icmp, args: [v14, v24], cond: Equal }) is_branch false side_effect false value_needed false + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block2 inst inst14 (UnaryImm { opcode: Iconst, imm: Imm64(0) }) is_branch false side_effect false value_needed false + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block2 inst inst7 (Binary { opcode: Iadd, args: [v10, v23] }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst7: Binary { opcode: Iadd, args: [v10, v23] } + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v10 at cur_inst Some(inst7) cur_scan_entry_color Some(InstColor(5)) + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v23 at cur_inst Some(inst7) cur_scan_entry_color Some(InstColor(5)) + TRACE cranelift_codegen::machinst::lower > -> src inst inst13 + TRACE cranelift_codegen::machinst::lower > -> has lowering side effect: false + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v10 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v135, v2097151] } + TRACE cranelift_codegen::machinst::lower > emit: lea -1(%v135), %v149l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v139 to v149 + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block2 inst inst13 (UnaryImm { opcode: Iconst, imm: Imm64(-1) }) is_branch false side_effect false value_needed false + TRACE cranelift_codegen::machinst::lower > lower_clif_branches: block block1 branch inst5 targets [MachLabel(3)] + TRACE cranelift_codegen::machinst::lower > emit: jmp label3 + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v7 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v133, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v28 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v134, v2097151] } + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v28 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v134, v2097151] } + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block1 inst inst5 (Jump { opcode: Jump, destination: BlockCall { values: EntityList { index: 37, unused: PhantomData } } }) is_branch true side_effect true value_needed false + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block1 inst inst17 (UnaryImm { opcode: Iconst, imm: Imm64(1) }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst17: UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::machinst::lower > emit: movl $1, %v150l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v134 to v150 + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block1 inst inst4 (Binary { opcode: Iadd, args: [v0, v22] }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst4: Binary { opcode: Iadd, args: [v0, v22] } + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v0 at cur_inst Some(inst4) cur_scan_entry_color Some(InstColor(3)) + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v22 at cur_inst Some(inst4) cur_scan_entry_color Some(InstColor(3)) + TRACE cranelift_codegen::machinst::lower > -> src inst inst12 + TRACE cranelift_codegen::machinst::lower > -> has lowering side effect: false + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v0 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v128, v2097151] } + TRACE cranelift_codegen::machinst::lower > emit: lea -2(%v128), %v151l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v133 to v151 + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block1 inst inst12 (UnaryImm { opcode: Iconst, imm: Imm64(-2) }) is_branch false side_effect false value_needed false + TRACE cranelift_codegen::machinst::lower > emit: jmp label6 + TRACE cranelift_codegen::machinst::lower > lower_clif_branches: block block0 branch inst2 targets [MachLabel(1), MachLabel(2)] + TRACE cranelift_codegen::machinst::lower > get_input_for_val: val v25 at cur_inst Some(inst2) cur_scan_entry_color None + TRACE cranelift_codegen::machinst::lower > -> src inst inst15 + TRACE cranelift_codegen::machinst::lower > -> has lowering side effect: false + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v0 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v128, v2097151] } + TRACE cranelift_codegen::machinst::lower > emit: cmpl $3, %v128l + TRACE cranelift_codegen::machinst::lower > emit: jb label1; j label2 + TRACE cranelift_codegen::machinst::lower > put_value_in_regs: val v2 + TRACE cranelift_codegen::machinst::lower > -> regs ValueRegs { parts: [v131, v2097151] } + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst2 (Brif { opcode: Brif, arg: v26, blocks: [BlockCall { values: EntityList { index: 13, unused: PhantomData } }, BlockCall { values: EntityList { index: 21, unused: PhantomData } }] }) is_branch true side_effect true value_needed false + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst1 (UnaryImm { opcode: Iconst, imm: Imm64(1) }) is_branch false side_effect false value_needed true + TRACE cranelift_codegen::machinst::lower > lowering: inst inst1: UnaryImm { opcode: Iconst, imm: Imm64(1) } + TRACE cranelift_codegen::machinst::lower > emit: movl $1, %v153l + TRACE cranelift_codegen::machinst::lower > set vreg alias: from v131 to v153 + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst16 (IntCompare { opcode: Icmp, args: [v0, v25], cond: UnsignedLessThan }) is_branch false side_effect false value_needed false + TRACE cranelift_codegen::machinst::lower > lower_clif_block: block block0 inst inst15 (UnaryImm { opcode: Iconst, imm: Imm64(3) }) is_branch false side_effect false value_needed false + TRACE cranelift_codegen::machinst::lower > gen_arg_setup: entry BB block0 args are: +[v0] + TRACE cranelift_codegen::machinst::abi > gen_retval_area_setup: not needed + TRACE cranelift_codegen::machinst::lower > emit: args %v128=%rdi + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 144, class = Int) -> VReg(vreg = 144, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 145, class = Int) -> VReg(vreg = 145, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 146, class = Int) -> VReg(vreg = 146, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 147, class = Int) -> VReg(vreg = 147, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 142, class = Int) -> VReg(vreg = 148, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 139, class = Int) -> VReg(vreg = 149, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 142, class = Int) -> VReg(vreg = 148, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 136, class = Int) -> VReg(vreg = 136, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 133, class = Int) -> VReg(vreg = 151, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 134, class = Int) -> VReg(vreg = 150, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 134, class = Int) -> VReg(vreg = 150, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 152, class = Int) -> VReg(vreg = 152, class = Int) + TRACE cranelift_codegen::machinst::vcode > operandcollector: block arg VReg(vreg = 131, class = Int) -> VReg(vreg = 153, class = Int) + TRACE cranelift_codegen::machinst::lower > built vcode: VCode { + Entry block: 0 + v131 := v153 + v133 := v151 + v134 := v150 + v139 := v149 + v142 := v148 +Block 0(): + (original IR block: block0) + (successor: Block 1(v153)) + (successor: Block 2()) + (instruction range: 0 .. 4) + Inst 0: args %v128=%rdi + Inst 1: movl $1, %v153l + Inst 2: cmpl $3, %v128l + Inst 3: jb label1; j label2 +Block 1(v152): + (successor: Block 6(v152)) + (instruction range: 4 .. 5) + Inst 4: jmp label6 +Block 2(): + (original IR block: block1) + (successor: Block 3(v151, v150, v150)) + (instruction range: 5 .. 8) + Inst 5: lea -2(%v128), %v151l + Inst 6: movl $1, %v150l + Inst 7: jmp label3 +Block 3(v135, v136, v137): + (original IR block: block2) + (successor: Block 4(v148)) + (successor: Block 5(v149, v148, v136)) + (instruction range: 8 .. 12) + Inst 8: lea -1(%v135), %v149l + Inst 9: lea 0(%v136,%v137,1), %v148l + Inst 10: testl %v139l, %v139l + Inst 11: jz label4; j label5 +Block 4(v147): + (successor: Block 6(v147)) + (instruction range: 12 .. 13) + Inst 12: jmp label6 +Block 5(v144, v145, v146): + (successor: Block 3(v144, v145, v146)) + (instruction range: 13 .. 14) + Inst 13: jmp label3 +Block 6(v143): + (original IR block: block3) + (instruction range: 14 .. 15) + Inst 14: ret %v143=%rax +} + + DEBUG cranelift_codegen::timing > timing: Ending VCode lowering + DEBUG cranelift_codegen::machinst::compile > Number of lowered vcode instructions: 15 + DEBUG cranelift_codegen::machinst::compile > Number of lowered vcode blocks: 7 + TRACE cranelift_codegen::machinst::compile > vcode from lowering: +VCode { + Entry block: 0 + v131 := v153 + v133 := v151 + v134 := v150 + v139 := v149 + v142 := v148 +Block 0(): + (original IR block: block0) + (successor: Block 1(v153)) + (successor: Block 2()) + (instruction range: 0 .. 4) + Inst 0: args %v128=%rdi + Inst 1: movl $1, %v153l + Inst 2: cmpl $3, %v128l + Inst 3: jb label1; j label2 +Block 1(v152): + (successor: Block 6(v152)) + (instruction range: 4 .. 5) + Inst 4: jmp label6 +Block 2(): + (original IR block: block1) + (successor: Block 3(v151, v150, v150)) + (instruction range: 5 .. 8) + Inst 5: lea -2(%v128), %v151l + Inst 6: movl $1, %v150l + Inst 7: jmp label3 +Block 3(v135, v136, v137): + (original IR block: block2) + (successor: Block 4(v148)) + (successor: Block 5(v149, v148, v136)) + (instruction range: 8 .. 12) + Inst 8: lea -1(%v135), %v149l + Inst 9: lea 0(%v136,%v137,1), %v148l + Inst 10: testl %v139l, %v139l + Inst 11: jz label4; j label5 +Block 4(v147): + (successor: Block 6(v147)) + (instruction range: 12 .. 13) + Inst 12: jmp label6 +Block 5(v144, v145, v146): + (successor: Block 3(v144, v145, v146)) + (instruction range: 13 .. 14) + Inst 13: jmp label3 +Block 6(v143): + (original IR block: block3) + (instruction range: 14 .. 15) + Inst 14: ret %v143=%rax +} + + DEBUG cranelift_codegen::timing > timing: Starting Register allocation, (during Compilation passes) + TRACE regalloc2::ion::fast_alloc > Calculating uses for block 0 + TRACE regalloc2::ion::fast_alloc > Calculating uses for block 2 + TRACE regalloc2::ion::fast_alloc > Calculating uses for block 3 + TRACE regalloc2::ion::fast_alloc > Calculating uses for block 5 + TRACE regalloc2::ion::fast_alloc > Calculating uses for block 4 + TRACE regalloc2::ion::fast_alloc > Calculating uses for block 1 + TRACE regalloc2::ion::fast_alloc > Calculating uses for block 6 + TRACE regalloc2::ion::fast_alloc > computing liveins for block6 + TRACE regalloc2::ion::fast_alloc > -> initial liveout set: [] + TRACE regalloc2::ion::fast_alloc > op Use: v143i fixed(p0i) was_live = false + TRACE regalloc2::ion::fast_alloc > computed liveins at block6: [] + TRACE regalloc2::ion::fast_alloc > computing liveins for block1 + TRACE regalloc2::ion::fast_alloc > -> initial liveout set: [] + TRACE regalloc2::ion::fast_alloc > computed liveins at block1: [] + TRACE regalloc2::ion::fast_alloc > computing liveins for block4 + TRACE regalloc2::ion::fast_alloc > -> initial liveout set: [] + TRACE regalloc2::ion::fast_alloc > computed liveins at block4: [] + TRACE regalloc2::ion::fast_alloc > computing liveins for block5 + TRACE regalloc2::ion::fast_alloc > -> initial liveout set: [] + TRACE regalloc2::ion::fast_alloc > computed liveins at block5: [] + TRACE regalloc2::ion::fast_alloc > computing liveins for block3 + TRACE regalloc2::ion::fast_alloc > -> initial liveout set: [] + TRACE regalloc2::ion::fast_alloc > op Use: v149i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Use: v149i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Def: v148i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Use: v136i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Use: v137i reg was_live = false + TRACE regalloc2::ion::fast_alloc > op Def: v149i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Use: v135i reg was_live = false + TRACE regalloc2::ion::fast_alloc > computed liveins at block3: [] + TRACE regalloc2::ion::fast_alloc > computing liveins for block2 + TRACE regalloc2::ion::fast_alloc > -> initial liveout set: [] + TRACE regalloc2::ion::fast_alloc > op Def: v150i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Def: v151i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Use: v128i reg was_live = false + TRACE regalloc2::ion::fast_alloc > liveouts of block0 changed to: [128] + TRACE regalloc2::ion::fast_alloc > computed liveins at block2: [128] + TRACE regalloc2::ion::fast_alloc > computing liveins for block0 + TRACE regalloc2::ion::fast_alloc > -> initial liveout set: [128] + TRACE regalloc2::ion::fast_alloc > op Use: v128i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Def: v153i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Def: v128i fixed(p7i) was_live = true + TRACE regalloc2::ion::fast_alloc > computed liveins at block0: [] + TRACE regalloc2::ion::fast_alloc > computing liveins for block0 + TRACE regalloc2::ion::fast_alloc > -> initial liveout set: [128] + TRACE regalloc2::ion::fast_alloc > op Use: v128i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Def: v153i reg was_live = true + TRACE regalloc2::ion::fast_alloc > op Def: v128i fixed(p7i) was_live = true + TRACE regalloc2::ion::fast_alloc > computed liveins at block0: [] + TRACE regalloc2::ion::fast_alloc > Allocating block 0 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 0 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 0) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v128i fixed(p7i) + TRACE regalloc2::ion::fast_alloc > Allocated slot 0 for v128 + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 0 + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v128i fixed(p7i) + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 1 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 1) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v153i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v153i reg + TRACE regalloc2::ion::fast_alloc > Allocated slot 1 for v153 + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 2 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 2) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v128i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v128i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 3 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 3) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 0 + TRACE regalloc2::ion::fast_alloc > Successors not allocated. Creating allocation + TRACE regalloc2::ion::fast_alloc > Creating block 1 + TRACE regalloc2::ion::fast_alloc > v153 died at the edge, reuse stack slot for v152 + TRACE regalloc2::ion::fast_alloc > Creating block 2 + TRACE regalloc2::ion::fast_alloc > Allocating block 2 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 5 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 3) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v151i reg + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v128i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v128i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 1 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v151i reg + TRACE regalloc2::ion::fast_alloc > Allocated slot 2 for v151 + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 6 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 5) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v150i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v150i reg + TRACE regalloc2::ion::fast_alloc > Allocated slot 3 for v150 + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 7 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 6) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 2 + TRACE regalloc2::ion::fast_alloc > Successors not allocated. Creating allocation + TRACE regalloc2::ion::fast_alloc > Creating block 3 + TRACE regalloc2::ion::fast_alloc > v151 died at the edge, reuse stack slot for v135 + TRACE regalloc2::ion::fast_alloc > v150 died at the edge, reuse stack slot for v136 + TRACE regalloc2::ion::fast_alloc > Moving v150 from slot 3 to slot 4 for v137 + TRACE regalloc2::ion::fast_alloc > Allocating block 3 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 8 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 6) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v149i reg + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v135i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v135i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 1 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v149i reg + TRACE regalloc2::ion::fast_alloc > Allocated slot 5 for v149 + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 9 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 8) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v148i reg + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v136i reg + TRACE regalloc2::ion::fast_alloc > Operand 2: Use: v137i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v136i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 1 + TRACE regalloc2::ion::fast_alloc > Operand 2: Use: v137i reg + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 2 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Def: v148i reg + TRACE regalloc2::ion::fast_alloc > Allocated slot 6 for v148 + TRACE regalloc2::ion::fast_alloc > Chose p0i for operand 0 + TRACE regalloc2::ion::fast_alloc > Clearing p0i + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 10 (refs_on_stack: false, is_ret: false, is_branch: false, alloc_idx: 11) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v149i reg + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v149i reg + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v149i reg + TRACE regalloc2::ion::fast_alloc > Chose p6i for operand 0 + TRACE regalloc2::ion::fast_alloc > Operand 1: Use: v149i reg + TRACE regalloc2::ion::fast_alloc > Chose p7i for operand 1 + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Clearing p6i + TRACE regalloc2::ion::fast_alloc > Clearing p7i + TRACE regalloc2::ion::fast_alloc > Allocating Inst 11 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 13) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 3 + TRACE regalloc2::ion::fast_alloc > Successors not allocated. Creating allocation + TRACE regalloc2::ion::fast_alloc > Creating block 4 + TRACE regalloc2::ion::fast_alloc > v148 died at the edge, reuse stack slot for v147 + TRACE regalloc2::ion::fast_alloc > Creating block 5 + TRACE regalloc2::ion::fast_alloc > v149 died at the edge, reuse stack slot for v144 + TRACE regalloc2::ion::fast_alloc > v148 died at the edge, reuse stack slot for v145 + TRACE regalloc2::ion::fast_alloc > v136 died at the edge, reuse stack slot for v146 + TRACE regalloc2::ion::fast_alloc > Allocating block 5 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 13 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 13) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 5 + TRACE regalloc2::ion::fast_alloc > Only one allocated successor, moving allocations + TRACE regalloc2::ion::fast_alloc > Move v144 from slot 5 to slot 2 for v135 + TRACE regalloc2::ion::fast_alloc > Move v145 from slot 6 to slot 3 for v136 + TRACE regalloc2::ion::fast_alloc > Move v146 from slot 3 to slot 4 for v137 + TRACE regalloc2::ion::fast_alloc > Allocating block 4 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 12 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 13) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 4 + TRACE regalloc2::ion::fast_alloc > Successors not allocated. Creating allocation + TRACE regalloc2::ion::fast_alloc > Creating block 6 + TRACE regalloc2::ion::fast_alloc > v147 died at the edge, reuse stack slot for v143 + TRACE regalloc2::ion::fast_alloc > Allocating block 1 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 4 (refs_on_stack: false, is_ret: false, is_branch: true, alloc_idx: 3) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 1 + TRACE regalloc2::ion::fast_alloc > Only one allocated successor, moving allocations + TRACE regalloc2::ion::fast_alloc > Move v152 from slot 1 to slot 6 for v143 + TRACE regalloc2::ion::fast_alloc > Allocating block 6 + TRACE regalloc2::ion::fast_alloc > Allocating Inst 14 (refs_on_stack: false, is_ret: true, is_branch: false, alloc_idx: 13) + TRACE regalloc2::ion::fast_alloc > Clobbers: + TRACE regalloc2::ion::fast_alloc > First alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v143i fixed(p0i) + TRACE regalloc2::ion::fast_alloc > Chose p0i for operand 0 + TRACE regalloc2::ion::fast_alloc > Second alloc pass + TRACE regalloc2::ion::fast_alloc > Operand 0: Use: v143i fixed(p0i) + TRACE regalloc2::ion::fast_alloc > Third alloc pass + TRACE regalloc2::ion::fast_alloc > Clearing p0i + TRACE regalloc2::ion::fast_alloc > Allocating outgoing blockparams for 6 + TRACE regalloc2::ion::fast_alloc > Last inst 14 is not a branch + TRACE regalloc2::ion::fast_alloc > Edits: + TRACE regalloc2::ion::fast_alloc > At progpoint0-post from p7i to stack0 + TRACE regalloc2::ion::fast_alloc > At progpoint1-post from p6i to stack1 + TRACE regalloc2::ion::fast_alloc > At progpoint2-pre from stack0 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint4-pre from stack1 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint4-pre from p6i to stack6 + TRACE regalloc2::ion::fast_alloc > At progpoint5-pre from stack0 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint5-post from p7i to stack2 + TRACE regalloc2::ion::fast_alloc > At progpoint6-post from p6i to stack3 + TRACE regalloc2::ion::fast_alloc > At progpoint7-pre from stack3 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint7-pre from p6i to stack4 + TRACE regalloc2::ion::fast_alloc > At progpoint8-pre from stack2 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint8-post from p7i to stack5 + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from stack3 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint9-pre from stack4 to p7i + TRACE regalloc2::ion::fast_alloc > At progpoint9-post from p0i to stack6 + TRACE regalloc2::ion::fast_alloc > At progpoint10-pre from stack5 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint10-pre from stack5 to p7i + TRACE regalloc2::ion::fast_alloc > At progpoint13-pre from stack5 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint13-pre from p6i to stack2 + TRACE regalloc2::ion::fast_alloc > At progpoint13-pre from stack6 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint13-pre from p6i to stack3 + TRACE regalloc2::ion::fast_alloc > At progpoint13-pre from stack3 to p6i + TRACE regalloc2::ion::fast_alloc > At progpoint13-pre from p6i to stack4 + TRACE regalloc2::ion::fast_alloc > At progpoint14-pre from stack6 to p0i + TRACE regalloc2::ion::fast_alloc > StackMaps: + DEBUG cranelift_codegen::timing > timing: Ending Register allocation + DEBUG cranelift_codegen::timing > timing: Starting VCode emission, (during Compilation passes) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: first 7 labels are for blocks + TRACE cranelift_codegen::machinst::buffer > MachBuffer: next 0 labels are for constants + TRACE cranelift_codegen::machinst::vcode > emitting block Block(0) + TRACE cranelift_codegen::machinst::vcode > -> entry block + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 0: 55 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 1: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 2: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 3: e5 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 4: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 5: 83 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 6: ec + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 7: 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(0) at offset 8 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [] + l = [MachLabel(0)] + f = [] + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [] + l = [MachLabel(0)] + f = [] + TRACE cranelift_codegen::machinst::vcode > Emitting inst 0 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p7i to slot 0 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 0 } -> sp_off 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 8: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 9: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 10: 3c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 11: 24 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 1 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 12: be + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 13: 1 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 1 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 1 } -> sp_off 8 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 17: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 18: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 19: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 20: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 21: 8 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 0 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 0 } -> sp_off 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 22: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 23: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 24: 34 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 25: 24 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 2 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 26: 83 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 27: fe + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 28: 3 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 3 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 31 label MachLabel(1) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 29: f + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 30: 82 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 31: 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 36 label MachLabel(2) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 35: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 36: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(1) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(1) at offset 40 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 29, end: 35, target: MachLabel(1), fixup: 0, inverted: Some([15, 131, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 35, end: 40, target: MachLabel(2), fixup: 1, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(1)] + f = [MachLabelFixup { label: MachLabel(1), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(2), offset: 36, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 35, end: 40, target: MachLabel(2), fixup: 1, inverted: None, labels_at_this_branch: [] } at off 40 + TRACE cranelift_codegen::machinst::buffer > -> more than one branch; prev_b = MachBranch { start: 29, end: 35, target: MachLabel(1), fixup: 0, inverted: Some([15, 131, 0, 0, 0, 0]), labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > -> uncond follows a conditional, and conditional's target resolves to current offset + TRACE cranelift_codegen::machinst::buffer > truncate_last_branch: truncated MachBranch { start: 35, end: 40, target: MachLabel(2), fixup: 1, inverted: None, labels_at_this_branch: [] }; off now 35 + TRACE cranelift_codegen::machinst::buffer > -> reassigning target of condbr to MachLabel(2) + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 29, end: 35, target: MachLabel(2), fixup: 0, inverted: Some([15, 130, 0, 0, 0, 0]), labels_at_this_branch: [] } at off 35 + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 29, end: 35, target: MachLabel(2), fixup: 0, inverted: Some([15, 130, 0, 0, 0, 0]), labels_at_this_branch: [] }] + l = [MachLabel(1)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 1 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 1 } -> sp_off 8 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 35: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 36: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 37: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 38: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 39: 8 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 6 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 6 } -> sp_off 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 40: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 41: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 42: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 43: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 44: 30 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 4 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 46 label MachLabel(6) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 45: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 46: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(2) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(2) at offset 50 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 29, end: 35, target: MachLabel(2), fixup: 0, inverted: Some([15, 130, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 45, end: 50, target: MachLabel(6), fixup: 1, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(2)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 45, end: 50, target: MachLabel(6), fixup: 1, inverted: None, labels_at_this_branch: [] } at off 50 + TRACE cranelift_codegen::machinst::buffer > -> more than one branch; prev_b = MachBranch { start: 29, end: 35, target: MachLabel(2), fixup: 0, inverted: Some([15, 130, 0, 0, 0, 0]), labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 29, end: 35, target: MachLabel(2), fixup: 0, inverted: Some([15, 130, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 45, end: 50, target: MachLabel(6), fixup: 1, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(2)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 0 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 0 } -> sp_off 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 50: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 51: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 52: 34 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 53: 24 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 5 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 54: 8d + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 55: 7e + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 56: fe + TRACE cranelift_codegen::machinst::vcode > Emitting move from p7i to slot 2 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 2 } -> sp_off 16 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 57: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 58: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 59: 7c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 60: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 61: 10 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 6 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 62: be + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 63: 1 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 3 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 3 } -> sp_off 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 67: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 68: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 69: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 70: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 71: 18 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 3 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 3 } -> sp_off 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 72: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 73: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 74: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 75: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 76: 18 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 4 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 4 } -> sp_off 32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 77: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 78: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 79: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 80: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 81: 20 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 7 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 83 label MachLabel(3) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 82: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 83: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(3) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(3) at offset 87 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 29, end: 35, target: MachLabel(2), fixup: 0, inverted: Some([15, 130, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 45, end: 50, target: MachLabel(6), fixup: 1, inverted: None, labels_at_this_branch: [] }, MachBranch { start: 82, end: 87, target: MachLabel(3), fixup: 2, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(3)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(3), offset: 83, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 82, end: 87, target: MachLabel(3), fixup: 2, inverted: None, labels_at_this_branch: [] } at off 87 + TRACE cranelift_codegen::machinst::buffer > branch with target == cur off; truncating + TRACE cranelift_codegen::machinst::buffer > truncate_last_branch: truncated MachBranch { start: 82, end: 87, target: MachLabel(3), fixup: 2, inverted: None, labels_at_this_branch: [] }; off now 82 + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 45, end: 50, target: MachLabel(6), fixup: 1, inverted: None, labels_at_this_branch: [] } at off 82 + TRACE cranelift_codegen::machinst::buffer > purge_latest_branches: removing branch MachBranch { start: 45, end: 50, target: MachLabel(6), fixup: 1, inverted: None, labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [] + l = [MachLabel(3)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 2 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 2 } -> sp_off 16 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 82: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 83: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 84: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 85: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 86: 10 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 8 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 87: 8d + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 88: 7e + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 89: ff + TRACE cranelift_codegen::machinst::vcode > Emitting move from p7i to slot 5 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 5 } -> sp_off 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 90: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 91: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 92: 7c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 93: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 94: 28 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 3 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 3 } -> sp_off 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 95: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 96: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 97: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 98: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 99: 18 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 4 to p7i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 4 } -> sp_off 32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 100: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 101: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 102: 7c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 103: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 104: 20 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 105: 8d + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 106: 44 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 107: 3e + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 108: 0 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p0i to slot 6 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 6 } -> sp_off 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 109: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 110: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 111: 44 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 112: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 113: 30 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 5 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 5 } -> sp_off 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 114: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 115: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 116: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 117: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 118: 28 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 5 to p7i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 5 } -> sp_off 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 119: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 120: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 121: 7c + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 122: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 123: 28 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 10 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 124: 85 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 125: fe + TRACE cranelift_codegen::machinst::vcode > Emitting inst 11 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 128 label MachLabel(4) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 126: f + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 127: 84 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 128: 0 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 133 label MachLabel(5) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 132: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 133: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(4) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(4) at offset 137 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 126, end: 132, target: MachLabel(4), fixup: 2, inverted: Some([15, 133, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 132, end: 137, target: MachLabel(5), fixup: 3, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(4)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(4), offset: 128, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(5), offset: 133, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 132, end: 137, target: MachLabel(5), fixup: 3, inverted: None, labels_at_this_branch: [] } at off 137 + TRACE cranelift_codegen::machinst::buffer > -> more than one branch; prev_b = MachBranch { start: 126, end: 132, target: MachLabel(4), fixup: 2, inverted: Some([15, 133, 0, 0, 0, 0]), labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > -> uncond follows a conditional, and conditional's target resolves to current offset + TRACE cranelift_codegen::machinst::buffer > truncate_last_branch: truncated MachBranch { start: 132, end: 137, target: MachLabel(5), fixup: 3, inverted: None, labels_at_this_branch: [] }; off now 132 + TRACE cranelift_codegen::machinst::buffer > -> reassigning target of condbr to MachLabel(5) + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 126, end: 132, target: MachLabel(5), fixup: 2, inverted: Some([15, 132, 0, 0, 0, 0]), labels_at_this_branch: [] } at off 132 + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 126, end: 132, target: MachLabel(5), fixup: 2, inverted: Some([15, 132, 0, 0, 0, 0]), labels_at_this_branch: [] }] + l = [MachLabel(4)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(5), offset: 128, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting inst 12 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 133 label MachLabel(6) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 132: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 133: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(5) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(5) at offset 137 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 126, end: 132, target: MachLabel(5), fixup: 2, inverted: Some([15, 132, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 132, end: 137, target: MachLabel(6), fixup: 3, inverted: None, labels_at_this_branch: [MachLabel(4)] }] + l = [MachLabel(5)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(5), offset: 128, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 133, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 132, end: 137, target: MachLabel(6), fixup: 3, inverted: None, labels_at_this_branch: [MachLabel(4)] } at off 137 + TRACE cranelift_codegen::machinst::buffer > -> label at start of branch MachLabel(4) redirected to target MachLabel(6) + TRACE cranelift_codegen::machinst::buffer > -> after label redirects, restarting loop + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 132, end: 137, target: MachLabel(6), fixup: 3, inverted: None, labels_at_this_branch: [] } at off 137 + TRACE cranelift_codegen::machinst::buffer > -> more than one branch; prev_b = MachBranch { start: 126, end: 132, target: MachLabel(5), fixup: 2, inverted: Some([15, 132, 0, 0, 0, 0]), labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > -> uncond follows a conditional, and conditional's target resolves to current offset + TRACE cranelift_codegen::machinst::buffer > truncate_last_branch: truncated MachBranch { start: 132, end: 137, target: MachLabel(6), fixup: 3, inverted: None, labels_at_this_branch: [] }; off now 132 + TRACE cranelift_codegen::machinst::buffer > -> reassigning target of condbr to MachLabel(6) + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 126, end: 132, target: MachLabel(6), fixup: 2, inverted: Some([15, 133, 0, 0, 0, 0]), labels_at_this_branch: [] } at off 132 + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 126, end: 132, target: MachLabel(6), fixup: 2, inverted: Some([15, 133, 0, 0, 0, 0]), labels_at_this_branch: [] }] + l = [MachLabel(5)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 128, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 5 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 5 } -> sp_off 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 132: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 133: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 134: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 135: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 136: 28 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 2 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 2 } -> sp_off 16 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 137: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 138: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 139: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 140: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 141: 10 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 6 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 6 } -> sp_off 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 142: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 143: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 144: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 145: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 146: 30 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 3 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 3 } -> sp_off 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 147: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 148: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 149: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 150: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 151: 18 + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 3 to p6i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 3 } -> sp_off 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 152: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 153: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 154: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 155: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 156: 18 + TRACE cranelift_codegen::machinst::vcode > Emitting move from p6i to slot 4 + TRACE cranelift_codegen::machinst::abi > store_spillslot: slot SpillSlot { bits: 4 } -> sp_off 32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 157: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 158: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 159: 74 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 160: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 161: 20 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 13 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: use_label_at_offset: offset 163 label MachLabel(3) kind JmpRel32 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 162: e9 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put 32-bit word @ 163: 0 + TRACE cranelift_codegen::machinst::vcode > emitting block Block(6) + TRACE cranelift_codegen::machinst::buffer > MachBuffer: bind label MachLabel(6) at offset 167 + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 126, end: 132, target: MachLabel(6), fixup: 2, inverted: Some([15, 133, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 162, end: 167, target: MachLabel(3), fixup: 3, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(6)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 128, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(3), offset: 163, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 162, end: 167, target: MachLabel(3), fixup: 3, inverted: None, labels_at_this_branch: [] } at off 167 + TRACE cranelift_codegen::machinst::buffer > -> more than one branch; prev_b = MachBranch { start: 126, end: 132, target: MachLabel(6), fixup: 2, inverted: Some([15, 133, 0, 0, 0, 0]), labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [MachBranch { start: 126, end: 132, target: MachLabel(6), fixup: 2, inverted: Some([15, 133, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 162, end: 167, target: MachLabel(3), fixup: 3, inverted: None, labels_at_this_branch: [] }] + l = [MachLabel(6)] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 128, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(3), offset: 163, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::vcode > Emitting move from slot 6 to p0i + TRACE cranelift_codegen::machinst::abi > load_spillslot: slot SpillSlot { bits: 6 } -> sp_off 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 167: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 168: 8b + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 169: 44 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 170: 24 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 171: 30 + TRACE cranelift_codegen::machinst::vcode > Emitting inst 14 + TRACE cranelift_codegen::machinst::abi > Epilogue: [addq %rsp, $64, %rsp, movq %rbp, %rsp, popq %rbp, ret] + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 172: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 173: 83 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 174: c4 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 175: 40 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 176: 48 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 177: 89 + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 178: ec + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 179: 5d + TRACE cranelift_codegen::machinst::buffer > MachBuffer: put byte @ 180: c3 + TRACE cranelift_codegen::machinst::vcode > Disassembly: + pushq %rbp + unwind PushFrameRegs { offset_upward_to_caller_sp: 16 } + movq %rsp, %rbp + unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } + subq %rsp, $64, %rsp +block0: + movq %rdi, rsp(0 + virtual offset) + movl $1, %esi + movq %rsi, rsp(8 + virtual offset) + movq rsp(0 + virtual offset), %rsi + cmpl $3, %esi + jb label1; j label2 +block1: + movq rsp(8 + virtual offset), %rsi + movq %rsi, rsp(48 + virtual offset) + jmp label6 +block2: + movq rsp(0 + virtual offset), %rsi + lea -2(%rsi), %edi + movq %rdi, rsp(16 + virtual offset) + movl $1, %esi + movq %rsi, rsp(24 + virtual offset) + movq rsp(24 + virtual offset), %rsi + movq %rsi, rsp(32 + virtual offset) + jmp label3 +block3: + movq rsp(16 + virtual offset), %rsi + lea -1(%rsi), %edi + movq %rdi, rsp(40 + virtual offset) + movq rsp(24 + virtual offset), %rsi + movq rsp(32 + virtual offset), %rdi + lea 0(%rsi,%rdi,1), %eax + movq %rax, rsp(48 + virtual offset) + movq rsp(40 + virtual offset), %rsi + movq rsp(40 + virtual offset), %rdi + testl %edi, %esi + jz label4; j label5 +block4: + jmp label6 +block5: + movq rsp(40 + virtual offset), %rsi + movq %rsi, rsp(16 + virtual offset) + movq rsp(48 + virtual offset), %rsi + movq %rsi, rsp(24 + virtual offset) + movq rsp(24 + virtual offset), %rsi + movq %rsi, rsp(32 + virtual offset) + jmp label3 +block6: + movq rsp(48 + virtual offset), %rax + addq %rsp, $64, %rsp + movq %rbp, %rsp + popq %rbp + ret + + DEBUG cranelift_codegen::timing > timing: Ending VCode emission + DEBUG cranelift_codegen::timing > timing: Starting VCode emission finalization, (during Compilation passes) + TRACE cranelift_codegen::machinst::buffer > enter optimize_branches: + b = [MachBranch { start: 126, end: 132, target: MachLabel(6), fixup: 2, inverted: Some([15, 133, 0, 0, 0, 0]), labels_at_this_branch: [] }, MachBranch { start: 162, end: 167, target: MachLabel(3), fixup: 3, inverted: None, labels_at_this_branch: [] }] + l = [] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 128, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(3), offset: 163, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > optimize_branches: last branch MachBranch { start: 162, end: 167, target: MachLabel(3), fixup: 3, inverted: None, labels_at_this_branch: [] } at off 181 + TRACE cranelift_codegen::machinst::buffer > purge_latest_branches: removing branch MachBranch { start: 162, end: 167, target: MachLabel(3), fixup: 3, inverted: None, labels_at_this_branch: [] } + TRACE cranelift_codegen::machinst::buffer > leave optimize_branches: + b = [] + l = [] + f = [MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(6), offset: 128, kind: JmpRel32 }, MachLabelFixup { label: MachLabel(3), offset: 163, kind: JmpRel32 }] + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(2), offset: 31, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 50, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(6), offset: 46, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 167, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(6), offset: 128, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 167, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + TRACE cranelift_codegen::machinst::buffer > emit_island: fixup MachLabelFixup { label: MachLabel(3), offset: 163, kind: JmpRel32 } + TRACE cranelift_codegen::machinst::buffer > -> label_offset = 82, known, required = false (pos 2147483647 neg 2147483648) + TRACE cranelift_codegen::machinst::buffer > patching in-range! + DEBUG cranelift_codegen::timing > timing: Ending VCode emission finalization + TRACE cranelift_codegen::isa::x64 > disassembly: + pushq %rbp + unwind PushFrameRegs { offset_upward_to_caller_sp: 16 } + movq %rsp, %rbp + unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } + subq %rsp, $64, %rsp +block0: + movq %rdi, rsp(0 + virtual offset) + movl $1, %esi + movq %rsi, rsp(8 + virtual offset) + movq rsp(0 + virtual offset), %rsi + cmpl $3, %esi + jb label1; j label2 +block1: + movq rsp(8 + virtual offset), %rsi + movq %rsi, rsp(48 + virtual offset) + jmp label6 +block2: + movq rsp(0 + virtual offset), %rsi + lea -2(%rsi), %edi + movq %rdi, rsp(16 + virtual offset) + movl $1, %esi + movq %rsi, rsp(24 + virtual offset) + movq rsp(24 + virtual offset), %rsi + movq %rsi, rsp(32 + virtual offset) + jmp label3 +block3: + movq rsp(16 + virtual offset), %rsi + lea -1(%rsi), %edi + movq %rdi, rsp(40 + virtual offset) + movq rsp(24 + virtual offset), %rsi + movq rsp(32 + virtual offset), %rdi + lea 0(%rsi,%rdi,1), %eax + movq %rax, rsp(48 + virtual offset) + movq rsp(40 + virtual offset), %rsi + movq rsp(40 + virtual offset), %rdi + testl %edi, %esi + jz label4; j label5 +block4: + jmp label6 +block5: + movq rsp(40 + virtual offset), %rsi + movq %rsi, rsp(16 + virtual offset) + movq rsp(48 + virtual offset), %rsi + movq %rsi, rsp(24 + virtual offset) + movq rsp(24 + virtual offset), %rsi + movq %rsi, rsp(32 + virtual offset) + jmp label3 +block6: + movq rsp(48 + virtual offset), %rax + addq %rsp, $64, %rsp + movq %rbp, %rsp + popq %rbp + ret + + DEBUG cranelift_codegen::timing > timing: Ending Compilation passes